參數(shù)資料
型號: ATAM893T-TKS
廠商: Atmel
文件頁數(shù): 28/98頁
文件大小: 0K
描述: IC MON TIRE-PRESS ATARX9X SER
標準包裝: 830
系列: MARC4
核心處理器: MARC4
芯體尺寸: 4-位
速度: 4MHz
連通性: SSI(2 線,3 線)
外圍設(shè)備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: EEPROM
EEPROM 大?。?/td> 64 x 16
RAM 容量: 256 x 4
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 6.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 管件
34
4680C–4BMCU–01/05
ATAM893-D
5.3.1.1
Timer 1 Control Register 1 (T1C1)
Bit 3 = MSB, Bit 0 = LSB
The three bits T1C[2:0] select the divider for timer 1. The resulting time interval depends on this
divider and the timer 1 input clock source. The timer input can be supplied by the system clock,
the 32-kHz oscillator or via the clock management. If the clock management generates the
SUBCL, the selected input clock from the RC oscillator, 4-MHz oscillator or an external clock is
divided by 16.
Address: '7'hex - Subaddress: '8'hex
Bit 3
Bit 2
Bit 1
Bit 0
T1C1
T1RM
T1C2
T1C1
T1C0
Reset value: 1111b
T1RM
Timer 1 Restart Mode
T1RM = 0, write access without Timer 1 restart
T1RM = 1, write access with Timer 1 restart
Note: if WDL = 0, Timer 1 restart is impossible
T1C2
Timer 1 Control bit 2
T1C1
Timer 1 Control bit 1
T1C0
Timer 1 Control bit 0
Table 5-6.
Timer 1 Control Bits
T1C2
T1C1
T1C0
Divider
Time Interval with
SUBCL
Time Interval with
SUBCL = 32 kHz
Time Interval with
SYSCL = 2/1 MHz
0
2
SUBCL/2
61 s
1 s/2 s
0
1
4
SUBCL/4
122 s
2 s/4 s
0
1
0
8
SUBCL/8
244 s
4 s/8 s
0
1
16
SUBCL/16
488 s
8 s/16 s
1
0
32
SUBCL/32
0.977 ms
16 s/32 s
1
0
1
256
SUBCL/256
7.812 ms
128 s/256 s
1
0
2048
SUBCL/2048
62.5 ms
1024 s/2048 s
1
16384
SUBCL/16384
500 ms
8192 s/16384 s
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