參數(shù)資料
型號: ATAM893T-TKS
廠商: Atmel
文件頁數(shù): 37/98頁
文件大?。?/td> 0K
描述: IC MON TIRE-PRESS ATARX9X SER
標(biāo)準(zhǔn)包裝: 830
系列: MARC4
核心處理器: MARC4
芯體尺寸: 4-位
速度: 4MHz
連通性: SSI(2 線,3 線)
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: EEPROM
EEPROM 大小: 64 x 16
RAM 容量: 256 x 4
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 6.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 管件
42
4680C–4BMCU–01/05
ATAM893-D
Timer 2 Output Mode 5
Manchester Modulator: Timer 2 Modulates the SSI internal data output (SO) to Manchester
code
Figure 5-21. Manchester Modulation
Timer 2 Output Mode 7
PWM Mode: Pulse-width modulation output on Timer 2 output pin (T2O)
In this mode the timer overflow defines the period and the compare register defines the duty
cycle. During one period only the first compare match occurrence is used to toggle the timer out-
put flip-flop. Until the overflow all further compare match are ignored. This avoids the situation
that changing the compare register causes the occurrence of several compare match during one
period. The resolution at the pulse-width modulation Timer 2 mode 1 is 12-bit and all other
Timer 2 modes are 8-bit.
Figure 5-22. PWM Modulation
5.3.2.4
Timer 2 Registers
Timer 2 has 6 control registers to configure the timer mode, the time interval, the input clock and
its output function. All registers are indirectly addressed using extended addressing as
described in Section 5.1 on page 22. The alternate functions of the Ports BP41 or BP42 must be
selected with the Port 4 control register P4CR, if one of the Timer 2 modes require an input at
T2I/BP41 or an output at T2O/BP42.
TOG2
SC
SO
T2O
00
0
00
11
0
1
0
1
11
1
8-bit SR Data
Bit 7
Bit 0
0
Bit 7
Bit 0
Data: 00110101
0
50
255
100
0
255 0
150
255 0 50
255 0
100
T2R
Input clock
Counter 2/2
OVF2
CM2
INT4
T2O
load the next
compare value
T2CO2 = 150
load
T1
T2
T3
T1
T2
TT
T
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