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參數(shù)資料
| 型號： | CP2120-GM |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 6/24頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C/SPI 8B 20QFN |
| 產(chǎn)品培訓(xùn)模塊： | CP21xx USB Bridge |
| 標(biāo)準(zhǔn)包裝： | 91 |
| 接口： | I²C，SPI |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-QFN（4x4） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 627 (CN2011-ZH PDF) |
| 其它名稱： | 336-1324 |
CP2120
14
Rev. 0.4
Internal Register Definition 1. I2CCLOCK: I2C Clock Frequency Configuration
The transaction time-out counter, which terminates an I2C transaction after a set period of time has passed, can be
configured through the I2CTO Internal Register. If the time-out counter is not enabled, the CP2120 will make only
one attempt at executing an I2C transaction and abort if that transaction attempt fails.
Equation 2. CTO Time-Out Frequency
Internal Register Definition 2. I2CTO: I2C Time Out
The SPI Master can assign an I2C address to the CP2120 by writing to the I2CADR Internal Register. Setting this
address is not necessary for device operation. If set, the CP2120 will ACK this address when another I2C Master
on the bus attempts to communicate with it. The CP2120 will NACK all attempts at data transfer when responding
as an I2C slave.
Internal Register Definition 3. I2CADR: I2C Address
Internal Register Address: 0x02
Reset Value:
0xA0
Bit 7-0:
I2CCK7-0: I2C Clock Frequency Configuration value (minimum register value = 5,
maximum register value = 255)
R/W
I2CCK7
I2CCK6
I2CCK5
I2CCK4
I2CCK3
I2CCK2
I2CCK1
I2CCK0
Bit 7
Bit 6
Bit 5
Bit 4
Bit3
Bit 2
Bit 1
Bit 0
Time-out Frequency
TO
128
---------- Hz
=
Internal Register Address:
0x03
Reset Value:
0x00
Bit 7-1:
TO6-0: Time Out Value
Bit 0:
TEN:Time Out Enable Bit.
0: Disable Timer.
1: Enable Timer.
R/W
TO6
TO5
TO4
TO3
TO2
TO1
TO0
TEN
Bit 7
Bit 6
Bit 5
Bit 4
Bit3
Bit 2
Bit 1
Bit 0
Internal Register Address:
0x05
Reset Value:
0x00
Bit 7-Bit 0:
I2CAD7-0: I2C Address
Sets I2C bus address.
R/W
I2CAD7
I2CAD6
I2CAD5
I2CAD4
I2CAD3
I2CAD2
I2CAD1
I2CAD0
Bit 7
Bit 6
Bit 5
Bit 4
Bit3
Bit 2
Bit 1
Bit 0
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