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| 型號： | CP2201EK |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 52/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVAL FOR CP2201 ETH CTRLR |
| 標準包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng)傳感器 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | CP2200，CP2201 |
| 主要屬性： | 溫度和光傳感器 |
| 次要屬性： | 圖形用戶界面 |
| 已供物品： | 板，電源，線纜，CD |
| 產(chǎn)品目錄頁面： | 627 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | 336-1313-ND - IC ETH CTRLR SNGL-CHIP 28QFN 336-1312-ND - IC ETH CTRLR SNGL-CHIP 48TQFP |
| 其它名稱： | 336-1316 |
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CP2200/1
48
Rev. 1.0
11.2. Transmitting a Packet
Once reset initialization is complete (See ), the CP2200/1 is ready to transmit Ethernet packets. The following
procedure can be used to transmit a packet:
Step 1: Wait for the previous packet to complete (TXBUSY == 0x00). The worst case time to transmit a
packet is 500 ms in half-duplex mode with exponential backoff.
Step 2: Set the TXSTARTH:TXSTARTL transmit buffer pointer to 0x0000.
Step 3: If the last packet was aborted ((TXSTA3 & 0xF8) != 0x00), then this packet must be loaded into the
transmit buffer using the Random Memory Access Method:
a. Set RAMADDRH:RAMADDRL to 0x0000.
b. Write the first data byte to RAMTXDATA.
c. Increment RAMADDRH:RAMADDRL.
d. Write another data byte to RAMTXDATA.
e. Repeat steps c and d until the entire packet is loaded.
f. Pad small packets to at least 64 bytes.
g. Set TXENDH:TXENDL to the address of the last byte added. This value must be greater than or
equal to 0x0040.
Step 4: If the last packet was successfully transmitted ((TXSTA2 & 0x80) == 0x80), then this packet may be
loaded into the transmit buffer using the AutoWrite Interface:
a. Write all data bytes to the TXAUTOWR register, one byte at time.
b. If the MAC is in half-duplex mode, pad small packets to at least 64 bytes.
Step 5: Set the TXSTARTH:TXSTARTL transmit buffer pointer back to 0x0000.
Step 6: Write a ‘1’ to the TXGO bit (TXCN.0) to begin transmission.
Note: Step 4 may be skipped if Step 3 is always performed.
11.3. Overriding Transmit Configuration Options
The global transmit configuration options are set in the MAC registers. The transmit interface allows the host
processor to customize packet transmission on a per-packet basis by overriding the global MAC settings. The
following options can be overridden by the transmit interface:
Short Frame Padding—When enabled, ensures that no frame smaller than 64 bytes is transmitted. The frame
size does not include the 8 byte preamble; however, the 4-byte CRC field is included.
CRC Generation—When enabled, a 32-bit CRC will be calculated and appended to the Ethernet frame.
Pause packet transmission (Full Duplex Mode)—When enabled, an Ethernet PAUSE packet with a pause value
of TXPAUSEH:TXPAUSEL is transmitted. The pause value is in units of 512 bit times (51.2 s).
Application of Back Pressure (Half Duplex Mode).
Switching between Half/Full Duplex Modes. Note: This setting does not affect the physical layer.
11.4. Transmit Buffer and AutoWrite Interface
The transmit buffer provides the AutoWrite interface to efficiently load the buffer with an entire packet. The interface
consists of three registers: TXSTART, TXEND, and TXAUTOWR. The TXSTART register points to the address of
the next available byte and can be reset to the first byte of the buffer. TXEND points to the last byte added to the
buffer. TXAUTOWR is the data register. Each write to TXAUTOWR sets TXEND to the address of the byte written
and increments TXSTART. After the packet is loaded into the buffer, TXSTART is reset to 0x0000 to mark the
starting point of the packet. TXEND will continue to point to the last byte in the packet.
Note: The AutoWrite Interface cannot be used following an aborted packet. This only applies if the device is in half-duplex
mode.
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