參數(shù)資料
型號(hào): CS42L51-DNZ
廠商: Cirrus Logic Inc
文件頁(yè)數(shù): 25/43頁(yè)
文件大?。?/td> 0K
描述: IC CODEC STEREO W/HDPN AMP 32QFN
標(biāo)準(zhǔn)包裝: 60
類型: 立體聲音頻
數(shù)據(jù)接口: 串行
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 98 / 98
電壓 - 電源,模擬: 1.8V,2.5V
電壓 - 電源,數(shù)字: 1.8V,2.5V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-QFN
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 754 (CN2011-ZH PDF)
配用: 598-1005-ND - BOARD EVAL FOR CS42L51 CODEC
其它名稱: 598-1627
DS679F1
31
CS42L51
4.3.5
Analog Input Multiplexer
A stereo 4-to-1 analog input multiplexer selects between a line-level input source, or a mic-level input
source, depending on the PDN_PGAx and AINx_MUX[1:0] bit settings. Signals may be routed to or by-
passed around the PGA. To conserve power, the PGA’s may be powered down allowing the user to select
from multiple line-level sources and route the stereo signal directly to the ADC. When using the MIC pre-
amp, however, the PGA must be powered up.
Analog input channel B may also be used as an output for the MIC bias voltage. The MICBIAS_SEL bit
routes the bias voltage to either of two pins. The multiplexer must then select from the remainder of the
two input channels.
The ADC, PGA and MIC pre-amplifier each has an associated input resistance. When selecting between
these paths, the input resistance to the CODEC will change accordingly. Refer to the input resistance
characteristics in the Characteristic and Specification Tables for the input resistance of each path.
4.3.6
MIC & PGA Gain
The MIC-level input passes through a +16 dB or +32 dB analog gain stage prior to the input multiplexer,
allowing it to be used for microphone level signals without the need for any external gain. The PGA must
be powered up when using the MIC pre-amp.
The PGA stage provides an additional +12 dB to -3 dB of analog gain in 0.5 dB steps.
Software
Controls:
Software
Controls:
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