參數(shù)資料
型號: CS80C286-12
廠商: Intersil
文件頁數(shù): 59/60頁
文件大?。?/td> 0K
描述: IC CPU 16BIT 5V 12.5MHZ 68-PLCC
標(biāo)準(zhǔn)包裝: 126
處理器類型: 80C286 16-位
速度: 12.5MHz
電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 68-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 68-PLCC(24.23x24.23)
包裝: 管件
8
TABLE 1. FLAGS WORD BIT FUNCTIONS
BIT POSITION
NAME
FUNCTION
0
CF
Carry Flag - Set on high-order bit carry or borrow; cleared otherwise.
2
PF
Parity Flag - Set if low-order 8 bits of result contain an even number of 1 bits; cleared otherwise.
4
AF
Set on carry from or borrow to the low order four bits of AL; cleared otherwise.
6
ZF
Zero Flag - Set if result is zero; cleared otherwise.
7
SF
Sign Flag - Set equal to high-order bit of result (0 if positive, 1 if negative).
11
OF
Overflow Flag - Set if result is a too-large positive number or a too-small negative number (excluding
sign-bit) to fit in destination operand; cleared otherwise.
8
TF
Single Step Flag - Once set, a single step interrupt occurs after the next instruction executes. TF is
cleared by the single step interrupt.
9
IF
Interrupt-Enable Flag - When set, maskable interrupts will cause the CPU to transfer control to an inter-
rupt vector specified location.
10
DF
Direction Flag - Causes string instructions to auto decrement the appropriate index registers when set.
Clearing DF causes auto increment.
CONTROL FLAGS:
TRAP FLAG
INTERRUPT ENABLE
DIRECTION FLAG
SPECIAL FIELDS:
I/O PRIVILEGE LEVEL
NESTED TASK FLAG
TS
EM
MP
PE
CF
PF
AF
ZF
SF
TF
IF
DF
OF
IOPL
NT
FLAGS:
14
15
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
2
3
15
OVERFLOW
SIGN
ZERO
AUXILIARY CARRY
PARITY
CARRY
STATUS FLAGS:
MSW:
RESERVED
TASK SWITCH
PROCESSOR EXTENSION EMULATED
MONITOR PROCESSOR EXTENSION
PROTECTION ENABLE
FIGURE 2. STATUS AND CONTROL REGISTER BIT FUNCTIONS
80C286
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