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| 型號： | CS80C286-12 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CPU 16BIT 5V 12.5MHZ 68-PLCC |
| 標準包裝： | 126 |
| 處理器類型： | 80C286 16-位 |
| 速度： | 12.5MHz |
| 電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 68-PLCC（24.23x24.23） |
| 包裝： | 管件 |
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15
80C286 Real Address Mode
The 80C286 executes a fully upward-compatible superset of
the 80C86 instruction set in real address mode. In real
address mode the 80C286 is object code compatible with
80C86 and 80C88 software. The real address mode archi-
tecture (registers and addressing modes) is exactly as
described in the 80C286 Base Architecture section of this
Functional Description.
Memory Size
Physical memory is a contiguous array of up to 1,048,576
bytes (one megabyte) addressed by pins A0 through A19
and BHE. A20 through A23 should be ignored.
Memory Addressing
In real address mode physical memory is a contiguous array
of up to 1,048,576 bytes (one megabyte) addressed by pin
A0 through A19 and BHE. Address bits A20-A23 may not
always be zero in real mode. A20-A23 should not be used by
the system while the 80C286 is operating in Real Mode.
The selector portion of a pointer is interpreted as the upper
16-bits of a 20-bit segment address. The lower four bits of
the 20-bit segment address are always zero. Segment
addresses, therefore, begin on multiples of 16 bytes. See
Figure 6 for a graphic representation of address information.
All segments in real address mode are 64K bytes in size and
may be read, written, or executed. An exception or interrupt
can occur if data operands or instructions attempt to wrap
around the end of a segment (e.g. a word with its low order
byte at offset FFFF(H) and its high order byte at offset
0000(H)). If, in real address mode, the information contained
in a segment does not use the full 64K bytes, the unused
end of the segment may be overlaid by another segment to
reduce physical memory requirements.
TABLE 8. RECOMMENDED MSW ENCODINGS FOR PROCESSOR EXTENSION CONTROL
TS
MP
EM
RECOMMENDED USE
INSTRUCTION
CAUSING
EXCEPTION 7
0
Initial encoding after RESET. 80C286 operation is identical to 80C86/88.
None
0
1
No processor extension is available. Software will emulate its function.
ESC
1
0
1
No processor extension is available. Software will emulate its function. The
current processor extension context may belong to another task.
ESC
0
1
0
A processor extension exists.
None
1
0
A processor extension exists. The current processor extension context may
belong to another task. The exception 7 on WAIT allows software to test for
an error pending from a previous processor extension operation.
ESC or WAIT
TABLE 9. REAL ADDRESS MODE ADDRESSING INTERRUPTS
FUNCTION
INTERRUPT
NUMBER
RELATED INSTRUCTIONS
RETURN ADDRESS
BEFORE INSTRUCTION
Interrupt table limit too small exception
8
INT vector is not within table limit
Yes
Processor extension segment overrun
interrupt
9
ESC with memory operand extending beyond offset
FFFF(H)
No
Segment overrun exception
13
Word memory reference with offset = FFFF(H) or an
attempt to execute past the end of a segment
Yes
0000
OFFSET
ADDRESS
0000
SEGMENT
SELECTOR
ADDER
19
0
15
0
20-BIT PHYSICAL
MEMORY ADDRESS
SEGMENT
ADDRESS
FIGURE 6. 80C286 REAL ADDRESS MODE ADDRESS
CALCULATION
80C286
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| CS80C286-1296 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| CS80C286-16 | 功能描述:微處理器 - MPU CPU 16BIT 5V CMOS 16 MHZ 68PLCC COM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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| CS80C286-2 | 制造商:Harris Corporation 功能描述: |
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