參數(shù)資料
型號: CY7C1020CV33-10ZXCT
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 32K X 16 STANDARD SRAM, 10 ns, PDSO44
封裝: LEAD FREE, TSOP2-44
文件頁數(shù): 2/9頁
文件大小: 133K
代理商: CY7C1020CV33-10ZXCT
CY7C1020CV33
Document #: 38-05133 Rev. *D
Page 2 of 9
Selection Guide
1020CV33-10
1020CV33-12
1020CV33-15
Unit
Maximum Access Time
10
12
15
ns
Maximum Operating Current
Com’l / Ind’l
90
85
80
mA
Automotive
-
85
mA
Maximum CMOS Standby Current
Com’l / Ind’l
5
mA
Automotive
-
10
mA
Pin Definitions
Pin Name
TSOP - Pin Number
I/O Type
Description
A0–A14
5,4,3,2,18,44,43,42,27,26,
25,24,21,20,19
Input
Address Inputs used to select one of the address locations.
I/O1–I/O16
7-10,13-16,29-32,35-38
Input/Output Bidirectional Data I/O lines. Used as input or output lines
depending on operation.
NC
1,22,23,28
No Connect No Connects. Not connected to the die.
WE
17
Input/Control Write Enable Input, active LOW. When selected LOW, a Write is
conducted. When deselected HIGH, a Read is conducted.
CE
6
Input/Control Chip Enable Input, active LOW. When LOW, selects the chip.
When HIGH, deselects the chip.
BHE, BLE
40,39
Input/Control Byte Write Select Inputs, active LOW. BLE controls I/O8–I/O1,
BHE controls I/O16–I/O9.
OE
41
Input/Control Output Enable, active LOW. Controls the direction of the I/O pins.
When LOW, the I/O pins are allowed to behave as outputs. When
deasserted HIGH, I/O pins are three-stated, and act as input data
pins.
VSS
12,34
Ground
Ground for the device. Should be connected to ground of the
system.
VCC
11,33
Power Supply Power Supply inputs to the device.
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相關代理商/技術參數(shù)
參數(shù)描述
CY7C1020CV33-12ZC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3.3V 512K-Bit 32K x 16 12ns 44-Pin TSOP-II
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CY7C1020CV33-15BAXI 制造商:Cypress Semiconductor 功能描述:
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CY7C1020CV33-15ZCT 制造商:Cypress Semiconductor 功能描述: