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參數(shù)資料
| 型號： | CY7C1217H |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 1-Mbit (32K x 36) Flow-Through Sync SRAM |
| 中文描述： | 1兆位（32K的× 36）流量通過同步SRAM的 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 362K |
| 代理商： | CY7C1217H |
CY7C1217H
Document #: 38-05670 Rev. *B
Page 11 of 16
Timing Diagrams
Read Cycle Timing[16]
Note:
16. On this diagram, when CE is LOW, CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH, CE1 is HIGH or CE2 is LOW or CE3 is HIGH.
tCYC
t
CL
CLK
tADH
tADS
ADDRESS
t
CH
tAH
tAS
A1
tCEH
tCES
Data Out (Q)
High-Z
tCLZ
tDOH
tCDV
tOEHZ
tCDV
Single READ
BURST
READ
tOEV
tOELZ
tCHZ
Burst wraps around
to its initial state
t
ADVH
t
ADVS
t
WEH
t
WES
tADH
tADS
Q(A2)
Q(A2 + 1)
Q(A2 + 2)
Q(A1)
Q(A2)
Q(A2 + 1)
Q(A2 + 2)
Q(A2 + 3)
A2
ADV suspends burst.
Deselect Cycle
DON’T CARE
UNDEFINED
ADSP
ADSC
GW, BWE,BW
[A:D]
CE
ADV
OE
[+] Feedback
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1217H-133AXC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 3.3V 1.125MBIT 32KX36 7.5NS 100TQFP - Bulk |
| CY7C1218H-133AXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1218H-166AXC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 1.125MBIT 32KX36 3.5NS 100TQFP - Bulk |
| CY7C1219F-133AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C12235DC | 制造商:CYPRESS 功能描述:New |
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