參數(shù)資料
型號(hào): DAC1208D650HN
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
中文描述: 12-BIT DAC, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁(yè)數(shù): 87/98頁(yè)
文件大?。?/td> 557K
代理商: DAC1208D650HN
DAC1208D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2010
87 of 98
NXP Semiconductors
DAC1208D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A interface
Table 191. LN3_CFG_3 register (address 13h) bit description
Default settings are shown highlighted.
Bit
Symbol
7
LN3_SCR
4 to 0
LN3_L[4:0]
Access
R
R
Value
-
-
Description
scrambling on
number of lanes minus 1
Table 192. LN3_CFG_4 register (address 14h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 0
LN3_F[7:0]
Access
R
Value
-
Description
number of octets per frame minus 1
Table 193. LN3_CFG_5 register (address 15h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN3_K[4:0]
Access
R
Value
-
Description
number of frames per multiframe minus 1
Table 194. LN3_CFG_6 register (address 16h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 0
LN3_M[7:0]
Access
R
Value
-
Description
number of converters per device minus 1
Table 195. LN3_CFG_7 register (address 17h) bit description
Default settings are shown highlighted.
Bit
7 to 6
4 to 0
Symbol
LN3_CS[1:0]
LN3_N[4:0]
Access
R
R
Value
-
-
Description
number of control bits
converter resolution minus 1
Table 196. LN3_CFG_8 register (address 18h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN3_N'[4:0]
Access
R
Value
-
Description
number of bits per sample minus 1
Table 197. LN3_CFG_9 register (address 19h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN3_S[4:0]
Access
R
Value
-
Description
number of samples per converter per frame cycle
minus 1
Table 198. LN3_CFG_10 register (address 1Ah) bit description
Default settings are shown highlighted.
Bit
Symbol
7
LN3_HD
4 to 0
LN3_CF[4:0]
Access
R
R
Value
-
-
Description
high density
number of control words per frame cycle
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