參數(shù)資料
型號(hào)： DK2100
廠商： Electronic Theatre Controls, Inc.
英文描述： Navigator Motion Processor
中文描述： 導(dǎo)航運(yùn)動(dòng)處理器
文件頁(yè)數(shù)： 31/59頁(yè)
文件大?。?/td> 1925K
代理商： DK2100
MC2300 Technical Specifications
31
5.4
Pin description tables
5.4.1
I/O chip
I/O Chip
Pin Name and
number
HostCmd
Direction
Description
81
Input
This signal is asserted
high
to write a host instruction to the Motion
Processor, or to read the status of the
HostRdy
and
HostIntrpt
signals. It is
asserted
low
to read or write a data word.
This signal is used to synchronize communication between the Motion
Processor and the host.
HostRdy
will go
low
(indicating host port busy) at
the end of a read or write operation according to the interface mode in
use, as follows:
Interface Mode
HostRdy
goes low
8/8
after the instruction byte is transferred
after the second byte of each data word is transferred
8/16
after the second byte of the instruction word
after the second byte of each data word is transferred
16/16
after the 16-bit instruction word
after each 16-bit data word
serial
n/a
HostRdy
will go
high,
indicating that the host port is ready to transmit,
when the last transmission has been processed. All host port
communications must be made with
HostRdy
high
(ready).
A typical busy-to-ready cycle is 12.5 microseconds.
When
~HostRead
is
low
, a data word is read from the Motion Processor.
When
~HostWrite
is
low
, a data word is written to the Motion Processor.
When
~HostSlct
is
low
, the host port is selected for reading or writing
operations.
I/O chip to CP chip interrupt. This signal sends an interrupt to the CP
chip whenever a host–chipset transmission occurs. It should be
connected to CP chip pin 53,
I/OIntrpt
.
This signal is
high
when the I/O chip is reading data from the I/O chip,
and
low
when it is writing data. It should be connected to CP chip pin 4,
R/W
.
This signal goes
low
when the data and address become valid during
Motion Processor communication with peripheral devices on the data
bus, such as external memory or a DAC. It should be connected to CP
chip pin 6,
Strobe
.
This signal goes
low
when a peripheral device on the data bus is being
addressed. It should be connected to CP chip pin 130,
PeriphSlct.
These signals are
high
when the CP chip is communicating with the I/O
chip (as distinguished from any other device on the data bus). They
should be connected to CP chip pins 110 (
Addr0
), 111 (
Addr1
), and 128
(
Addr15
).
This is the master clock signal for the Motion Processor. It is driven at a
nominal 40 MHz
HostRdy
8
Output
~HostRead
~HostWrite
~HostSlct
92
100
94
Input
Input
Input
CPIntrpt
77
Output
CPR/~W
53
Input
CPStrobe
54
Input
CPPeriphSlct
52
Input
CPAddr0
CPAddr1
CPAddr15
41
43
50
Input
MasterClkIn
89
Input
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