參數(shù)資料
型號(hào)： DM9161A
廠商： Electronic Theatre Controls, Inc.
英文描述： 10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER
中文描述： 10/100 Mbps快速以太網(wǎng)物理層單芯片收發(fā)器
文件頁(yè)數(shù)： 25/45頁(yè)
文件大?。?/td> 1206K
代理商： DM9161A
25
Preliminary
Version: DM9161A-DS-P04
Jan.19,2005
0.8
Duplex mode
1,RW
Duplex Mode
1 = Full duplex operation. Duplex selection is allowed when
Auto-negotiation is disabled (bit 12 of this register is cleared). With
auto-negotiation enabled, this bit reflects the duplex capability
selected by auto-negotiation
0 = Normal operation
Collision Test
1 = Collision test enabled. When set, this bit will cause the COL
signal to be asserted in response to the assertion of TX_EN
0 = Normal operation
Reserved
Read as 0, ignore on write
0.7
Collision test
0,RW
0.6-0.0
Reserved
0,RO
8.2 Basic Mode Status Register (BMSR) - 01
Bit
Bit Name
1.15
100BASE-T4
Default
0,RO/P
Description
100BASE-T4 Capable
1 = DM9161A is able to perform in 100BASE-T4 mode
0 = DM9161A is not able to perform in 100BASE-T4 mode
100BASE-TX Full Duplex Capable
1 = DM9161A is able to perform 100BASE-TX in full duplex mode
0 = DM9161A is not able to perform 100BASE-TX in full duplex mode
100BASE-TX Half Duplex Capable
1 = DM9161A is able to perform 100BASE-TX in half duplex mode
0 = DM9161A is not able to perform 100BASE-TX in half duplex
mode
10BASE-T Full Duplex Capable
1 = DM9161A is able to perform 10BASE-T in full duplex mode
0 = DM9161A is not able to perform 10BASE-TX in full duplex mode
10BASE-T Half Duplex Capable
1 = DM9161A is able to perform 10BASE-T in half duplex mode
0 = DM9161A is not able to perform 10BASE-T in half duplex mode
Reserved
Read as 0, ignore on write
MII Frame Preamble Suppression
1 = PHY will accept management frames with preamble suppressed
0 = PHY will not accept management frames with preamble
suppressed
Auto-negotiation Complete
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
Remote Fault
1 = Remote fault condition detected (cleared on read or by a chip
reset). Fault criteria and detection method is DM9161A
implementation specific. This bit will set after the RF bit in the
ANLPAR (bit 13, register address 05) is set
0 = No remote fault condition detected
Auto Configuration Ability
1 = DM9161A is able to perform auto-negotiation
0 = DM9161A is not able to perform auto-negotiation
Link Status
1 = Valid link is established (for either 10Mbps or 100Mbps operation)
1.14
100BASE-TX
full-duplex
1,RO/P
1.13
100BASE-TX
half-duplex
1,RO/P
1.12
10BASE-T
full-duplex
1,RO/P
1.11
10BASE-T
half-duplex
1,RO/P
1.10-1.7
Reserved
0,RO
1.6
MF preamble
suppression
1,RO
1.5
Auto-negotiation
Complete
0,RO
1.4
Remote fault
0, RO/LH
1.3
Auto-negotiation
ability
1,RO/P
1.2
Link status
0,RO/LL
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9161A_09 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
DM9161AE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER
DM9161AEP 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
DM9161B 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
DM9161BEP 制造商:DAVICOM 功能描述:IC TRX 10/100MBPS ENET PHY48LQFP 制造商:DAVICOM 功能描述:IC, TRX, 10/100MBPS, ENET PHY,48LQFP 制造商:DAVICOM 功能描述:IC, TRX, 10/100MBPS, ENET PHY,48LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3 / 802.3u; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:48; Interface Type:MII; Operating Temperature ;RoHS Compliant: Yes
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