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參數(shù)資料
| 型號(hào)： | DM9801E |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 1M home Phonrline Network Physical Layer Single Chip Transceiver |
| 中文描述： | 100萬家庭Phonrline網(wǎng)絡(luò)物理層單芯片收發(fā)器 |
| 文件頁數(shù)： | 12/61頁 |
| 文件大?。?/td> | 589K |
| 代理商： | DM9801E |
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DM9801
1M Home Phoneline Network Physical Layer Single Chip Transceiver
MII Interface Transmit and Receive Timing Diagram
(continued)
12
Preliminary
Version: DM9801-DS-P02
March 20, 2000
TX_CLK
RX_CLK
TX_EN
TXD
CRS
RXD
COL
RX_DV
0
0
RX_CLK becomes disabled (and left in the low state) as soon as CRS is asserted. The clock is re-enabled about 140 uS into
the packet.
RXPKT – CRS Asserted
Figure 3
TX_CLK
RX_CLK
TX_EN
TXD
CRS
RXD
COL
RX_DV
5 (Preamble)
DATA
0
0
0
0
0
RX_CLK and TX_CLK are unrelated to each other during this time. When a symbol has been received and decoded,
RX_CLK toggles at various frequencies depending on what data have been received. Once CRS falls, RX_CLK and
TX_CLK are toggled continuously at 933.3 ns for 22 cycles, after which DM9801 returns to the Idle State.
RXPKT – RX_CLK Active and CRS Cleared
Figure 4
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