參數(shù)資料
型號(hào)： DM9801E
廠商： Electronic Theatre Controls, Inc.
英文描述： 1M home Phonrline Network Physical Layer Single Chip Transceiver
中文描述： 100萬(wàn)家庭Phonrline網(wǎng)絡(luò)物理層單芯片收發(fā)器
文件頁(yè)數(shù)： 34/61頁(yè)
文件大?。?/td> 589K
代理商： DM9801E
DM9801
1M Home Phoneline Network Physical Layer Single Chip Transceiver
34
Preliminary
Version: DM9801-DS-P02
March 20, 2000
Symbol Control Register - Register 30
Bit
Bit Name
30.15 -
30.8
Default
0x1C, RW
Description
ISBI_FAST
Inter Symbol Blanking Interval (High Speed):
This value defines the number of TCLKs (116.7ns) between data
pulses for symbol 0 in High speed
Inter Symbol Blanking Interval (Low Speed):
This value defines the number of TCLKs (116.7ns) between data
pulses for symbol 0 in low speed
30.7 -
30.0
ISBI_SLOW
0x2C, RW
TX Signal Control Register - Register 31
Bit
Bit Name
31.15 -
31.8
Default
0x44, RW
Description
TX_PLS_CYCLS
Transmit Pulse Cycles:
The low nibble of this register indicates the number of pulses on the
HNN pins while the high nibble indicates the number of pulses on the
HNP pins.
Transmit Pulse Width:
This value determines the duration in OSC cycles (16.7 ns) that a
transmit pulse lasts.
31.7 -
31.0
TX_PLS_WIDTH
0x04, RW
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