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參數(shù)資料
| 型號： | DP83848C-MAU-EK |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 38/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION DP83848C |
| 標準包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng) |
| 已用 IC / 零件： | DP83848C |
| 已供物品： | 板 |
| 相關產(chǎn)品： | DP83848CVVX/NOPBTR-ND - TXRX ETHERNET PHYTER 48-LQFP DP83848CVV-ND - IC TXRX ETHERNET PHYTER 48-LQFP |
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7.1.1 Basic Mode Control Register (BMCR)
Table 12. Basic Mode Control Register (BMCR), address 0x00
Bit
Bit Name
Default
Description
15
Reset
0, RW/SC
Reset:
1 = Initiate software Reset / Reset in Process.
0 = Normal operation.
This bit, which is self-clearing, returns a value of one until the reset
process is complete. The configuration is re-strapped.
14
Loopback
0, RW
Loopback:
1 = Loopback enabled.
0 = Normal operation.
The loopback function enables MII transmit data to be routed to the MII
receive data path.
Setting this bit may cause the descrambler to lose synchronization and
produce a 500
s “dead time” before any valid data will appear at the
MII receive outputs.
13
Speed Selection
Strap, RW
Speed Select:
When auto-negotiation is disabled writing to this bit allows the port
speed to be selected.
1 = 100 Mb/s.
0 = 10 Mb/s.
12
Auto-Negotiation
Enable
Strap, RW
Auto-Negotiation Enable:
Strap controls initial value at reset.
1 = Auto-Negotiation Enabled - bits 8 and 13 of this register are ig-
nored when this bit is set.
0 = Auto-Negotiation Disabled - bits 8 and 13 determine the port speed
and duplex mode.
11
Power Down
0, RW
Power Down:
1 = Power down.
0 = Normal operation.
Setting this bit powers down the PHY. Only the register block is en-
abled during a power down condition. This bit is OR’d with the input
from the PWR_DOWN/INT pin. When the active low
PWR_DOWN/INT pin is asserted, this bit will be set.
10
Isolate
0, RW
Isolate:
1 = Isolates the Port from the MII with the exception of the serial man-
agement.
0 = Normal operation.
9
Restart Auto-
Negotiation
0, RW/SC
Restart Auto-Negotiation:
1 = Restart Auto-Negotiation. Re-initiates the Auto-Negotiation pro-
cess. If Auto-Negotiation is disabled (bit 12 = 0), this bit is ignored. This
bit is self-clearing and will return a value of 1 until Auto-Negotiation is
initiated, whereupon it will self-clear. Operation of the Auto-Negotiation
process is not affected by the management entity clearing this bit.
0 = Normal operation.
8
Duplex Mode
Strap, RW
Duplex Mode:
When auto-negotiation is disabled writing to this bit allows the port Du-
plex capability to be selected.
1 = Full Duplex operation.
0 = Half Duplex operation.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DP83848C-POE-EK | 功能描述:以太網(wǎng)開發(fā)工具 DP83848 POE CARD COMM TEMP RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| DP83848CVV | 制造商:Texas Instruments 功能描述:IC, 10/100 ETHERNET PHY, SMD, LQFP48 |
| DP83848CVV/NOPB | 功能描述:以太網(wǎng) IC PHYTER COMMERCIAL TEMP SGL PORT RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DP83848CVV/NOPB | 制造商:Texas Instruments 功能描述:Ethernet Transceiver |
| DP83848CVVX | 制造商:Texas Instruments 功能描述:PHY 1-CH 10Mbps/100Mbps 48-Pin LQFP T/R |
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