參數(shù)資料
型號: DP83848C-MAU-EK
廠商: National Semiconductor
文件頁數(shù): 72/86頁
文件大?。?/td> 0K
描述: BOARD EVALUATION DP83848C
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng)
已用 IC / 零件: DP83848C
已供物品:
相關(guān)產(chǎn)品: DP83848CVVX/NOPBTR-ND - TXRX ETHERNET PHYTER 48-LQFP
DP83848CVV-ND - IC TXRX ETHERNET PHYTER 48-LQFP
73
www.national.com
DP
83
84
8
C
8.2.15 10BASE-T Transmit Timing (Start of Packet)
Note: 1 bit time = 100 ns in 10Mb/s.
8.2.16 10BASE-T Transmit Timing (End of Packet)
Parameter
Description
Notes
Min
Typ
Max
Units
T2.15.1
Transmit Output Delay from the
Falling Edge of TX_CLK
10 Mb/s MII mode
3.5
bits
T2.15.2
Transmit Output Delay from the
Rising Edge of TX_CLK
10 Mb/s Serial mode
3.5
bits
Parameter
Description
Notes
Min
Typ
Max
Units
T2.16.1
End of Packet High Time
(with ‘0’ ending bit)
250
300
ns
T2.16.2
End of Packet High Time
(with ‘1’ ending bit)
250
300
ns
TX_CLK
TX_EN
TXD
PMD Output Pair
TX_CLK
TX_EN
PMD Output Pair
00
11
PMD Output Pair
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參數(shù)描述
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