參數(shù)資料
型號(hào)： DS2196LN
廠商： DALLAS SEMICONDUCTOR
元件分類： Digital Transmission Controller
英文描述： DATACOM, FRAMER, PQFP100
封裝： LQFP-100
文件頁數(shù)： 28/160頁
文件大?。?/td> 559K
代理商： DS2196LN
DS2196
123 of 160
Table 19-2: TRANSFORMER SPECIFICATIONS
SPECIFICATION
RECOMMENDED VALUE
Turns Ratio
1:1(receive) and 1:2(transmit) 5%
Primary Inductance
600
H minimum
Leakage Inductance
1.0
H maximum
Intertwining Capacitance
40 pF maximum
Transmit Transformer DC Resistance
Primary (Device side)
Secondary
1.0
maximum
2.0
maximum
Receive Transformer DC Resistance
Primary (Device side)
Secondary
1.2
maximum
1.2
maximum
19.3 JITTER ATTENUATOR
The DS2196 contains an onboard jitter attenuator that can be set to a depth of either 32 or 128 bits via the
JABDS bit in the Line Interface Control Register (LICR). The 128-bit mode is used in applications where
large excursions of wander are expected. The 32-bit mode is used in delay sensitive applications. The
characteristics of the attenuation are shown in Figure 19–4. The jitter attenuator can be placed in either
the receive path or the transmit path by appropriately setting or clearing the JAS bit in the LICR. Also,
the jitter attenuator can be disabled (in effect, removed) by setting the DJA bit in the LICR. In order for
the jitter attenuator to operate properly, a 1.544 MHz clock (50 ppm) must be applied at the MCLK pin.
Onboard circuitry adjusts either the recovered clock from the clock/data recovery block or the clock
applied at the TCLKLI pin to create a smooth jitter free clock which is used to clock data out of the jitter
attenuator FIFO. It is acceptable to provide a gapped/ bursty clock at the TCLKLI pin if the jitter
attenuator is placed on the transmit side. If the incoming jitter exceeds either 120 UIpp (buffer depth is
128 bits) or 28 UIpp (buffer depth is 32 bits), then the DS2196 will divide the internal nominal
24.704 MHz clock by either 15 or 17 instead of the normal 16 to keep the buffer from overflowing.
When the device divides by either 15 or 17, it also sets the Jitter Attenuator Limit Trip (JALT) bit in the
Receive Information Register (RIR3.5)
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參數(shù)描述
DS2196LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Dual Framer LIU RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS219T 功能描述:烙鐵 DESOLDERING HEAD RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included
DS21E352 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21E352N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21E354 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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