參數(shù)資料
型號： DS21Q44T+
廠商： Maxim Integrated Products
文件頁數(shù)： 39/105頁
文件大?。?/td> 0K
描述： IC FRAMER ENHANCED E1 4X 128TQFP
標準包裝： 72
控制器類型： E1 調(diào)幀器
接口： 并行/串行
電源電壓： 2.97 V ~ 3.63 V
電流 - 電源： 75mA
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x20）
包裝： 管件
DS21Q44
39 of 105
Table 7-1. ALARM CRITERIA
ALARM
SET CRITERIA
CLEAR CRITERIA
ITU SPEC.
RSA1
(receive signaling all 1’s)
Over 16 consecutive frames
(one full MF) timeslot 16
contains less than three 0’s
Over 16 consecutive frames
(one full MF) timeslot 16
contains three or more 0’s
G.732
4.2
RSA0
(receive signaling all 0’s)
Over 16 consecutive frames
(one full MF) timeslot 16
contains all 0’s
Over 16 consecutive frames
(one full MF) timeslot 16
contains at least a single 1
G.732
5.2
RDMA
(receive distant multiframe
alarm)
Bit 6 in timeslot 16 of frame
0 set to 1 for two
consecutive MF
Bit 6 in timeslot 16 of frame
0 set to 0 for two
consecutive MF
O.162
2.1.5
RUA1
(receive unframed all 1’s)
Less than three 0’s in two
frames (512 bits)
More than two 0’s in two
frames (512 bits)
O.162
1.6.1.2
RRA
(receive remote alarm)
Bit 3 of nonalign frame set
to one for three consecutive
occasions
Bit 3 of nonalign frame set
to 0 for three consecutive
occasions
O.162
2.1.4
RCL
(receive carrier loss)
255 (or 2048) consecutive
0’s received
In 255 bit times, at least 32
1’s are received
G.775/
G.962
SR2: STATUS REGISTER 2 (Address=07 Hex)
(MSB)
(LSB)
RMF
RAF
TMF
SEC
TAF
LOTC
RCMF
TSLIP
SYMBOL
POSITION
NAME AND DESCRIPTION
RMF
SR2.7
Receive CAS Multiframe. Set every 2 ms (regardless if CAS
signaling is enabled or not) on receive multiframe boundaries.
Used to alert the host that signaling data is available.
RAF
SR2.6
Receive Align Frame. Set every 250 s at the beginning of
align frames. Used to alert the host that Si and Sa bits are
available in the RAF and RNAF registers.
TMF
SR2.5
Transmit Multiframe. Set every 2 ms (regardless if CRC4 is
enabled) on transmit multiframe boundaries. Used to alert the
host that signaling data needs to be updated.
SEC
SR2.4
One Second Timer. Set on increments of one second based on
RCLK. If CCR2.7=1, then this bit will be set every 62.5 ms
instead of once a second.
TAF
SR2.3
Transmit Align Frame. Set every 250 s at the beginning of
align frames. Used to alert the host that the TAF and TNAF
registers need to be updated.
LOTC
SR2.2
Loss of Transmit Clock. Set when the TCLK pin has not
transitioned for one channel time (or 3.9 s). Will force the
LOTC pin high if enabled via TCR2.0.
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