參數(shù)資料
型號： DS21Q59LN+
廠商： Maxim Integrated Products
文件頁數(shù)： 31/76頁
文件大?。?/td> 0K
描述： IC TXRX E1 QUAD 100-LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 90
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 4/4
規(guī)程： E1
電源電壓： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 托盤
DS21Q59 Quad E1 Transceiver
37 of 76
12.
DS0 MONITORING FUNCTION
Each DS21Q59 framer can monitor one DS0 (64kbps) channel in the transmit direction and one DS0 channel in the
receive direction at the same time. In the transmit direction, the user determines which channel is to be monitored
by properly setting the TCM0 to TCM4 bits in the CCR3 register. In the receive direction, the RCM0 to RCM4 bits in
the CCR4 register need to be properly set. The DS0 channel pointed to by the TCM0 to TCM4 bits appear in the
transmit DS0 monitor (TDS0M) register and the DS0 channel pointed to by the RCM0 to RCM4 bits appear in the
receive DS0 (RDS0M) register. The TCM4 to TCM0 and RCM4 to RCM0 bits should be programmed with the
decimal decode of the appropriate E1 channel. For example, if DS0 channel 6 in the transmit direction and DS0
channel 15 in the receive direction needed to be monitored, then the following values would be programmed into
CCR4 and CCR5:
TCM4 = 0
RCM4 = 0
TCM3 = 0
RCM3 = 1
TCM2 = 1
RCM2 = 1
TCM1 = 0
RCM1 = 1
TCM0 = 1
RCM0 = 0
Register Name:
CCR3 (Repeated here from Section 6 for convenience.)
Register Description:
Common Control Register 3
Register Address:
14 Hex
Bit #
7
6
5
4
3
2
1
0
Name
RLB
LLB
LIAIS
TCM4
TCM3
TCM2
TCM1
TCM0
NAME
BIT
FUNCTION
RLB
7
Remote Loopback
LLB
6
Local Loopback
LIAIS
5
Line Interface AIS Generation Enable
TCM4
4
Transmit Channel Monitor Bit 4. MSB of a channel decode that
determines which transmit channel data appears in the TDS0M register.
See Section 10 or details.
TCM3
3
Transmit Channel Monitor Bit 3
TCM2
2
Transmit Channel Monitor Bit 2
TCM1
1
Transmit Channel Monitor Bit 1
TCM0
0
Transmit Channel Monitor Bit 0. LSB of the channel decode.
Register Name:
TDS0M
Register Description:
Transmit DS0 Monitor Register
Register Address:
22 Hex
Bit #
7
6
5
4
3
2
1
0
Name
B1
B2
B3
B4
B5
B6
B7
B8
NAME
BIT
FUNCTION
B1
7
Transmit DS0 Channel Bit 1. MSB of the DS0 channel (first bit to be
transmitted).
B2
6
Transmit DS0 Channel Bit 2
B3
5
Transmit DS0 Channel Bit 3
B4
4
Transmit DS0 Channel Bit 4
B5
3
Transmit DS0 Channel Bit 5
B6
2
Transmit DS0 Channel Bit 6
B7
1
Transmit DS0 Channel Bit 7
B8
0
Transmit DS0 Channel Bit 8. LSB of the DS0 channel (last bit to be
transmitted).
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