參數(shù)資料
型號(hào): DS21Q59LN+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 67/76頁(yè)
文件大小: 0K
描述: IC TXRX E1 QUAD 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
類(lèi)型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤(pán)
DS21Q59 Quad E1 Transceiver
7 of 76
3. BLOCK DIAGRAM
Figure 3-1. Block Diagram
AL
E(
AS)
/A
5
RRING1
RECEIVE-SIDE
FRAMER
TRANSMIT-
SIDE
FORMATTER
TCLK1
TSER1
RSER1
SYSCLK1
RSYNC1
ELASTIC
STORE AND
IBO BUFFER
TRING1
TTIP1
JI
TT
ER
ATT
E
NUA
T
O
R
EI
T
H
ER
T
R
ANSM
IT
O
R
RECE
IVE
PAT
H
RECEIVE
LINE
I/
F
CL
OCK/DA
T
A
RECOVERY
RTIP1
VCO/PLL
LINE
I/
F
T
R
ANSM
IT
DATA
CLOCK
SYNC
CLOCK
DATA
IBO
BUFFER
DIVIDE-
BY-2/4/8
MCLK
TSYNC1
SYNC
CONTROL
BU Ck
MUX
Tx Ck
MUX
A
B
A
B
C
USER OUTPUT
SELECT
OUTA1
OUTB1
RCLK TRANSCEIVER 2
RCLK TRANSCEIVER 3
RCLK TRANSCEIVER 4
MUX
4/8/16MHz
SYNTHESIZER
BACKUP CLOCK MUX
TRANSCEIVERS 2, 3, 4
4/8/16MCK
REFCLK
SYSTEM CLOCK
INTERFACE
TRANSMIT
CLOCK SOURCE
TRANSCEIVER 1 OF 4
TRANSMIT
SIDE
RECEIVE
SIDE
LOCA
LLOO
P
B
A
CK
RE
M
O
T
E
LOO
P
B
A
CK
FR
AM
ER
LOO
P
B
A
C
K
LOTC
DETECT
2.
048M
Hz
D0–D7
/
AD0–
AD
7
TS
1
IN
T
WR
(R/
W
)
RD
(DS
)
C
S
A0–
A
4
PARALLEL AND TEST CONTROL PORT
(ROUTED TO ALL BLOCKS)
BT
S1
BT
S0
TS
0
PBT
S
AJ
ACO
I
AJ
AC
KI
ALTERNATE
JITTER
ATTENUATOR
Dallas
Semiconductor
DS21Q59
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