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參數(shù)資料
| 型號： | DS31412N |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/89頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 12CH DS3/3 FRAMER 349-BGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 控制器類型： | DS3/E3 調(diào)幀器 |
| 接口： | LIU |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 電流 - 電源： | 960mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 349-BGA 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 349-HCBGA（27x27） |
| 包裝： | 托盤 |
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DS3146/DS3146/DS31412 6-/8-/12-Channel DS3/E3 Framers
18 of 89
7. FUNCTIONAL DESCRIPTION
7.1 Pin Inversions and Force High/Low
Many of the input and output pins can be inverted and some output pins can be forced high or low (TPOS, TNEG,
and RDAT). The inversion logic occurs at the input and output pads but before the JTAG control logic. The output
pins that can be forced high can also be forced low by setting both the force high and invert bits for those pins.
7.2 Transmitter Logic Description
In the normal operating mode, the transmit section adds either DS3 or E3 framing overhead to the payload coming
in on the TDAT input pin, then encodes the framed data in either HDB3 (E3 mode) or B3ZS (DS3 mode) and
outputs the positive and negative pulse signals on TPOS and TNEG along with the transmit clock on TCLK. In line
loopback mode (LLB bit in the MC2 register), TPOS, TNEG, and TCLK are buffered versions of RPOS, RNEG, and
RCLK. In payload loopback mode (PLB bit in the MC2 register), payload is sourced from the receiver, framing
overhead is added, and TCLK is a buffered version of RCLK. When a transmit alarm indication signal (TAIS) is
generated, an E3 or DS3 AIS signal is generated on TPOS/TNEG independent of the signal being internally
generated. This allows the device to be in diagnostic loopback (DLB) internally and simultaneously send AIS to the
transmit LIU interface. The TAIS is generated when either the TAIS bit in the T3E3CR1 register is set, or when
there is a loss of transmit clock and the LOTCMC bit in the MC1 register is set. The same applies to the generation
of unframed all ones when the TUA1 bit in the MC1 register is set. The TOHEN pin overwrites any of the data from
TDAT, RDAT, the BERT (BPLD in BERT payload mode) or the transmit formatter with data from the TOH pin. The
BERT signal in the unframed mode (BUFRM) is not overwritten with the TOH data. The data on TDAT (or RDAT in
PLB mode) can be sent without adding internal overhead by setting the TPT (transmit passthrough) bit in the
T3E3CR1 register. In transmit pass-through mode, data from TOH can still overwrite data from TDAT or RDAT.
Figure 7-1. Transmit Data Block Diagram
7.2.1 Transmit Clock
The transmit clock on the TICLK pin is monitored for activity, and, if the clock signal is inactive for several SCLK
cycles, then the loss of transmit clock (LOTC) status is set. The LOTC status is then cleared when the TICLK signal
is active for a few cycles.
The internal transmit clock can be sourced from either the TICLK pin or the RCLK pin, depending on LOTC status,
the LOTCMC control bit (in the MC1 register), and payload loopback (PLB). Normally, the internal transmit clock is
connected to the transmit input clock (TICLK) pin. When LOTC is detected and the LOTCMC bit is set, then the
internal transmit clock is connected to the receive clock (RCLK). Also, if payload loopback (PLB) is selected, then
the internal transmit clock is connected to RCLK. The TCLK output pin is sourced from the internal transmit clock
except in line loopback mode (LLB), where TCLK is always sourced from RCLK.
TPOS
TNEG
BERT
DS3
E3 G.751
FORMATTER
HDB3/B3ZS
ENCODER
TDAT
RPOS
RNEG
AIS
TO Rx DLB
PLB
TAIS
TOHEN
TOH
TSOF
TDEN
LLB
TPT
RDAT
BUFRM
BPLD
UNFRAMED ALL
ONES
TUA1
TO Rx BERT
TO RDAT MUX
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS31415 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock |
| DS31415_1107 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock |
| DS31415DK | 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS31415 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
| DS31415GN+ | 制造商:Microsemi Corporation 功能描述:SINGLE DPLL TIMING IC W/APLL & 1588 CLOCK - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:SINGLE DPLL TIMING IC W/APLL & 1588 CLOCK - Rail/Tube 制造商:Microsemi 功能描述:DPLL 256-Pin CSBGA |
| DS3141N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Single DS3/E3 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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