參數(shù)資料
型號(hào)： DS31412N
廠商： Maxim Integrated Products
文件頁數(shù)： 36/89頁
文件大小： 0K
描述： IC 12CH DS3/3 FRAMER 349-BGA
標(biāo)準(zhǔn)包裝： 1
控制器類型： DS3/E3 調(diào)幀器
接口： LIU
電源電壓： 3.135 V ~ 3.465 V
電流 - 電源： 960mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 349-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 349-HCBGA（27x27）
包裝： 托盤
DS3146/DS3146/DS31412 6-/8-/12-Channel DS3/E3 Framers
41 of 89
Table 7-E. DS3 Alarm Criteria
ALARM/
CONDITION
FUNCTION
SET CRITERIA
CLEAR CRITERIA
AIS
Alarm Indication Signal. Properly
framed 1010... pattern (starting
with 1 after each overhead bit),
all C bits set to 0
In each 84-bit information field, the
properly aligned 1010... pattern is
detected with fewer than four bit
errors (out of 84 possible) for 1024
consecutive information bit fields
(1.95ms) and all C bits are majority
decoded to be 0 during this time.
In each 84-bit information field,
the properly aligned 1010...
pattern is detected with four or
more bit errors (out of 84
possible) for 1024 consecutive
information bit fields (1.95ms)
RUA1
Unframed All-Ones
Four or fewer 0s in two consecutive
4760-bit frames
Five or more 0s in two
consecutive 4760-bit frames
LOS
Loss-of-Signal
192 consecutive 0s
No EXZ events over a 192-bit
window that starts with the first 1
received
OOF
Out-of-Frame. Too many F bits
or M bits in error.
Three or more F bits in error out of 16
consecutive, or two or more M bits in
error out of four consecutive
No errors in six consecutive sets
of four F bits followed by two
consecutive frames with no M
bits errors, X bits matching and
P bits matching
SEF
Severely Errored Frame
Three or more F bits in error out of 16
consecutive F bits
In sync (OOF = 0) and fewer
than three F bits in error out of
16 consecutive F bits
RAI
Remote Alarm Indication (Also
referred to as SEF/AIS in
Bellcore GR-820.)
X1 = X2 = 0 (active)
X1 = X2 = 1 (inactive)
X1 = X2 = 0 for four consecutive M-
frames (426
ms)
X1 = X2 = 1 for four consecutive
M-frames (426
ms)
T3IDLE
DS3 Idle Signal. Properly framed
1100... pattern (starting with 11
after each overhead bit), the C
bits in M-subframe 3 set to 0
In each 84-bit information field, the
properly aligned 1100... pattern is
detected with fewer than four bit
errors (out of 84 possible) for 1024
consecutive information bit fields
(1.95ms), and the C bits in M-
subframe 3 are majority decoded to
be 0 during this time
In each 84-bit information field,
the properly aligned 1100...
pattern is detected with four or
more bit errors (out of 84
possible) for 1024 consecutive
information bit fields (1.95ms)
Table 7-F. E3 Alarm Criteria
ALARM/
CONDITION
FUNCTION
SET CRITERIA
CLEAR CRITERIA
AIS
Alarm Indication Signal.
Unframed all ones.
Four or fewer 0s in two consecutive
1536-bit frames
Five or more 0s in two
consecutive 1536-bit frames
RUA1
Unframed All Ones
Four or fewer 0s in two consecutive
1536-bit frames
Five or more 0s in two
consecutive 1536-bit frames
LOS
Loss of Signal
192 consecutive 0s
No EXZ events over a 192-bit
window that starts with the first
1 received
SEF
Severely Errored Frame
Same as OOF
OOF
Out-of-Frame. Too many FAS
errors.
Four consecutive bad FAS
Three consecutive good FAS
RAI
Remote Alarm Indication
Inactive: bit 11 of the frame = 0
Active: bit 11 of the frame = 1
Bit 11 = 1 for four consecutive frames
(6144 bits, 179
ms)
Bit 11 = 0 for four consecutive
frames (6144 bits, 179
ms)
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