參數(shù)資料
型號: DSP1628
英文描述: TVS 400W 60V BIDIRECT SMA
中文描述: 澄清,串行I /設備的DSP1620/27/28/29 O控制注冊說明
文件頁數(shù): 91/114頁
文件大小: 804K
代理商: DSP1628
Preliminary Data Sheet
February 1997
DSP1628 Digital Signal Processor
89
Lucent Technologies Inc.
10 Timing Characteristics for 2.7 V Operation
(continued)
10.3 Reset Synchronization
* See Table 62 for input clock electrical requirements.
Note 1: CKO
1
and CKO
2
are two possible CKO states before reset. CKO is free-running.
Note 2: If the rising edge of RSTB (low to high) is captured instead by the falling edge of CKO (high to low), CKO and CKI will be in-phase
at t5 + 2 x t6.
Figure 13. Reset Synchronization Timing
Table 70. Timing Requirements for Reset Synchronization Timing
Abbreviated Reference
t126
Parameter
Min
3
Max
T/2 – 1
Unit
ns
Reset Setup (high to high)
CKI*
V
IH
V
IL
RSTB
t126
t5 + 2 x t6
CKO
2
CKO
1
V
IH
V
IL
V
OH
V
OL
V
OH
V
OL
5-4011 (C).a
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