參數(shù)資料
型號: DSP56852VFE
廠商: Freescale Semiconductor
文件頁數(shù): 15/48頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 120MHZ 81-MAPBGA
標(biāo)準(zhǔn)包裝: 348
系列: 568xx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 120MHz
連通性: EBI/EMI,SCI,SPI,SSI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 11
程序存儲器容量: 12KB(6K x 16)
程序存儲器類型: SRAM
RAM 容量: 4K x 16
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.3 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-LFBGA
包裝: 托盤
56852 Technical Data, Rev. 8
22
Freescale Semiconductor
4.5.2
High Speed External Clock Source (> 4MHz)
The recommended method of connecting an external clock is given in Figure 4-7. The external clock
source is connected to XTAL and the EXTAL pin is held at ground (recommended), VDDA, or VDDA/2.
The TOD_SEL bit in CGM must be set to 1.
Figure 4-7 Connecting a High Speed External Clock Signal using XTAL
4.5.3
Low Speed External Clock Source (2-4MHz)
The recommended method of connecting an external clock is given in Figure 4-8. The external clock
source is connected to XTAL and the EXTAL pin is held at VDDA/2. The TOD_SEL bit in CGM may be
set to 0 or 1. 0 is recommended.
Figure 4-8 Connecting a Low Speed External Clock Signal using XTAL
Table 4-5 External Clock Operation Timing Requirements4
Operating Conditions: VSS = VSSIO = VSSA = 0V, VDD = 1.62-1.98V, VDDIO = VDDA = 3.0–3.6V, TA = –40° to +120°C, CL 50pF, fop = 120MHz
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency of operation (external clock driver)1
1. See Figure 4-7 for details on using the recommended connection of an external clock driver.
fosc
0
240
MHz
Clock Pulse Width4
tPW
6.25
ns
External clock input rise time2, 4
2. External clock input rise time is measured from 10 to 90 percent.
trise
TBD
ns
External clock input fall time3, 4
3. External clock input fall time is measured from 90 to 10percent.
4. Parameters listed are guaranteed by design.
tfall
TBD
ns
56852
XTAL
EXTAL
External
GND,
VDDA,
Clock
(up to 240MHz)
or VDDA/2
56852
XTAL
EXTAL
External
Clock
(2-4MHz)
VDDA/2
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