參數(shù)資料
型號： DSP56852VFE
廠商： Freescale Semiconductor
文件頁數(shù)： 4/48頁
文件大?。?/td> 0K
描述： IC DSP 16BIT 120MHZ 81-MAPBGA
標準包裝： 348
系列： 568xx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 120MHz
連通性： EBI/EMI，SCI，SPI，SSI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 11
程序存儲器容量： 12KB（6K x 16）
程序存儲器類型： SRAM
RAM 容量： 4K x 16
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.3 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 81-LFBGA
包裝： 托盤
56852 Technical Data, Rev. 8
12
Freescale Semiconductor
E3
WR
Output
Bus Control–Write Enable (WR)— is asserted during external
memory write cycles. When WR is asserted low, pins D0–D15 become
outputs and the controller puts data on the bus. When WR is
deasserted high, the external data is latched inside the external device.
When WR is asserted, it qualifies the A0–A15 pins. WR can be
connected directly to the WE pin of a Static RAM.
B4
RXD
GPIOE0
Input
Input/Output
SCI Receive Data (RXD)—This input receives byte-oriented serial data
and transfers it to the SCI receive shift register.
Port E GPIO (0)—A general purpose I/O pin.
D4
TXD
GPIOE1
Output(Z)
Input/Output
SCI Transmit Data (TXD)—This signal transmits data from the SCI
transmit data register.
Port E GPIO (1)—A general purpose I/O pin.
B2
GPIOC0
STXD
Input/Output
Output
Port C GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when
the SSI is not in use.
SSI Transmit Data (STXD)—This output pin transmits serial data from
the SSI Transmitter Shift Register.
A2
GPIOC1
SRXD
Input/Output
Input
Port C GPIO (1)—This pin is a General Purpose I/O (GPIO) pin when
the SSI is not in use.
SSI Receive Data (SRXD)—This input pin receives serial data and
transfers the data to the SSI Receive Shift Register.
A3
SCLK
GPIOC2
STCK
Input/Output
Input/Output
SPI Serial Clock (SCLK)—In Master mode, this pin serves as an
output, clocking slaved listeners. In Slave mode, this pin serves as the
data clock input.
Port C GPIO (2)—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
SSI Serial Transfer Clock (STCK)—This bidirectional pin provides the
serial bit rate clock for the transmit section of the SSI. The clock signal
can be continuous or gated.
B3
SS
GPIOC3
STFS
Input
Input/Output
SPI Slave Select (SS)—In Master mode, this pin is used to arbitrate
multiple masters. In Slave mode, this pin is used to select the slave.
Port C GPIO (3)—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
SSI Serial Transfer Frame Sync (STFS) —This bidirectional pin is
used to count the number of words in a frame while transmitting. A
programmable frame rate divider and a word length divider are used for
frame rate sync signal generation.
Table 3-1. 56852 Signal and Package Information for the 81-pin MAPBGA (Continued)
Pin No.
Signal Name
Type
Description
相關(guān)PDF資料
PDF描述
DSP56854FGE IC DSP 16BIT 120MHZ 128-LQFP
DSP56855BUE IC DSP 16BIT 120MHZ 100-LQFP
DSP56857BUE IC DSP 16BIT 120MHZ 100-LQFP
DSP56858FVE IC DSP 16BIT 120MHZ 144-LQFP
DSP56F801FA80E IC DSP 60MHZ 16KB FLASH 48-LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56853 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
DSP56853E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
DSP56853FG120 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
DSP56853FGE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
DSP56853PB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56853 Digital Signal Processor Product Brief
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*