Figure 4-1 Maximum Run I
參數(shù)資料
型號: DSP56855BUE
廠商: Freescale Semiconductor
文件頁數(shù): 14/52頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 120MHZ 100-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: 568xx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 120MHz
連通性: EBI/EMI,SCI,SSI
外圍設(shè)備: DMA,POR,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 48KB(24K x 16)
程序存儲器類型: SRAM
RAM 容量: 24K x 16
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.98 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
Supply Voltage Sequencing and Separation Cautions
56855 Technical Data, Rev. 6
Freescale Semiconductor
21
Figure 4-1 Maximum Run IDDTOTAL vs. Frequency (see Notes 1. and 5. in Table 4-4)
4.3 Supply Voltage Sequencing and Separation Cautions
Figure 4-2 shows two situations to avoid in sequencing the VDD and VDDIO, VDDA supplies.
5.
Running core and performing external memory access. Clock at 120 MHz.
6.
When VDD drops below VEI max value, an interrupt is generated.
7.
Power-on reset occurs whenever the digital supply drops below 1.8V. While power is ramping up, this signal remains active
for as long as the internal 2.5V is below 1.8V no matter how long the ramp up rate is. The internally regulated voltage is typically
100 mV less than VDD during ramp up until 2.5V is reached, at which time it self-regulates.
0
30
60
120
150
20
40
60
80
100
120
IDD
(mA)
90
EMI Mode5
MAC Mode1
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DSP56857BU120 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT