參數(shù)資料
型號: DSP56855BUE
廠商: Freescale Semiconductor
文件頁數(shù): 51/52頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 120MHZ 100-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: 568xx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 120MHz
連通性: EBI/EMI,SCI,SSI
外圍設(shè)備: DMA,POR,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 48KB(24K x 16)
程序存儲器類型: SRAM
RAM 容量: 24K x 16
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.98 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
56855 Technical Data, Rev. 6
8
Freescale Semiconductor
Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56855 are organized into functional groups, as shown in Table 2-1 and
as illustrated in Figure 2-1. In Table 3-1 each table row describes the package pin and the signal or signals
present.
1. VDD = VDD CORE, VSS = VSS CORE, VDDIO= VDD IO, VSSIO = VSS IO, VDDA = VDD ANA, VSSA = VSS ANA
2. MODA, MODB and MODC can be used as GPIO after the bootstrap process has completed.
Table 2-1 56855 Functional Group Pin Allocations
Functional Group
Number of Pins
Power (VDD, VDDIO, or VDDA)
(4, 10, 1)1
Ground (VSS, VSSIO,or VSSA)
(4, 10, 1)1
PLL and Clock
3
External Bus Signals
39
External Chip Select*
4
Interrupt and Program Control
72
Enhanced Synchronous Serial Interface (ESSI0) Port*
6
Serial Communications Interface (SCI0) Ports*
2
Serial Communications Interface (SCI1) Ports*
2
Quad Timer Module Port*
1
JTAG/Enhanced On-Chip Emulation (EOnCE)
6
*Alternately, GPIO pins
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DSP56857BU120 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT