參數(shù)資料
型號: DSP56855BUE
廠商: Freescale Semiconductor
文件頁數(shù): 5/52頁
文件大小: 0K
描述: IC DSP 16BIT 120MHZ 100-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: 568xx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 120MHz
連通性: EBI/EMI,SCI,SSI
外圍設(shè)備: DMA,POR,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 48KB(24K x 16)
程序存儲器類型: SRAM
RAM 容量: 24K x 16
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.98 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
Introduction
56855 Technical Data, Rev. 6
Freescale Semiconductor
13
59
D0
Input/Output(Z)
Data Bus (D0-D15)—These pins provide the bidirectional data for external
program or data memory accesses.
67
D1
68
D2
69
D3
70
D4
71
D5
79
D6
80
D7
81
D8
82
D9
83
D10
94
D11
95
D12
98
D13
99
D14
3RD
Output
Read Enable (RD)— is asserted during external memory read cycles.
This signal is pulled high during reset.
4WR
Output
Write Enable (WR) — is asserted during external memory write cycles.
This signal is pulled high during reset.
61
CS0
GPIOA0
Output
Input/Output
External Chip Select (CS0)—This pin is used as a dedicated GPIO.
Port A GPIO (0) —This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
62
CS1
GPIOA1
Output
Input/Output
External Chip Select (CS1)—This pin is used as a dedicated GPIO.
Port A GPIO (1) —This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
63
CS2
GPIOA2
Output
Input/Output
External Chip Select (CS2)—This pin is used as a dedicated GPIO.
Port A GPIO (2) —This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
Table 3-1. 56855 Signal and Package Information for the 100-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
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DSP56857BU120 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT