參數(shù)資料
型號： DSP56855BUE
廠商： Freescale Semiconductor
文件頁數(shù)： 6/52頁
文件大?。?/td> 0K
描述： IC DSP 16BIT 120MHZ 100-LQFP
標準包裝： 90
系列： 568xx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 120MHz
連通性： EBI/EMI，SCI，SSI
外圍設(shè)備： DMA，POR，WDT
輸入/輸出數(shù)： 18
程序存儲器容量： 48KB（24K x 16）
程序存儲器類型： SRAM
RAM 容量： 24K x 16
電壓 - 電源 (Vcc/Vdd)： 1.62 V ~ 1.98 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-LQFP
包裝： 托盤
56855 Technical Data, Rev. 6
14
Freescale Semiconductor
64
CS3
GPIOA3
Output
Input/Output
External Chip Select (CS3)—This pin is used as a dedicated GPIO.
Port A GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
77
TIO0
GPIOG0
Input/Output
Input/Output
Timer Input/Output (TIO0)—This pin can be independently configured to
be either timer input source or output flag.
Port G GPIO (0)—This pin is a General Purpose I/O (GPIO) pin that can
individually be programmed as input or output pin.
16
IRQA
Input
External Interrupt Request A and B—The IRQA and IRQB inputs are
asynchronized external interrupt requests that indicate that an external
device is requesting service. A Schmitt trigger input is used for noise
immunity. They can be programmed to be level-sensitive or negative-edge-
triggered. If level-sensitive triggering is selected, an external pull-up resistor
is required for Wired-OR operation.
17
IRQB
11
MODA
GPIOH0
Input
Input/Output
Mode Select (MODA)—During the bootstrap process MODA selects one of
the eight bootstrap modes.
Port H GPIO (0)—This pin is a General Purpose I/O (GPIO) pin after the
bootstrap process has completed.
12
MODB
GPIOH1
Input
Input/Output
Mode Select (MODB)—During the bootstrap process MODB selects one of
the eight bootstrap modes.
Port H GPIO (1)—This pin is a General Purpose I/O (GPIO) pin after the
bootstrap process has completed.
13
MODC
GPIOH2
Input
Input/Output
Mode Select (MODC)—During the bootstrap process MODC selects one of
the eight bootstrap modes.
Port H GPIO (2)—This pin is a General Purpose I/O (GPIO) pin after the
bootstrap process has completed.
28
RESET
Input
Reset (RESET)—This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed in the
Reset state. A Schmitt trigger input is used for noise immunity. When the
RESET pin is deasserted, the initial chip operating mode is latched from the
MODA, MODB, and MODC pins.
To ensure complete hardware reset, RESET and TRST should be asserted
together. The only exception occurs in a debugging environment when a
hardware reset is required and it is necessary not to reset the
JTAG/Enhanced OnCE module. In this case, assert RESET, but do not
assert TRST.
27
RSTO
Output
Reset Output (RSTO)—This output is asserted on any reset condition
(external reset, low voltage, software or COP).
Table 3-1. 56855 Signal and Package Information for the 100-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56855E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
DSP56855PB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56855 Digital Signal Processor Product Brief
DSP56856 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digitial Signal Controller
DSP56857 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
DSP56857BU120 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
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