參數(shù)資料
型號(hào): DSP56F827FG80E
廠商: Freescale Semiconductor
文件頁數(shù): 20/60頁
文件大小: 0K
描述: IC HYBRID CTRLR 16BIT 128-LQFP
標(biāo)準(zhǔn)包裝: 72
系列: 56F8xx
核心處理器: 56800
芯體尺寸: 16-位
速度: 80MHz
連通性: EBI/EMI,SCI,SPI,SSI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 64
程序存儲(chǔ)器容量: 136KB(68K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 5K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 2.75 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 128-LQFP
包裝: 托盤
Flash Memory Characteristics
56F827 Technical Data, Rev. 12
Freescale Semiconductor
27
Figure 3-5 Signal States
3.5 Flash Memory Characteristics
Table 3-5 Flash Memory Truth Table
Mode
XE1
1. X address enable, all rows are disabled when XE = 0
YE2
2. Y address enable, YMUX is disabled when YE = 0
SE3
3. Sense amplifier enable
OE4
4. Output enable, tri-state Flash data out bus when OE = 0
PROG5
5. Defines program cycle
ERASE6
6. Defines erase cycle
MAS17
7. Defines mass erase cycle, erase whole block
NVSTR8
8. Defines non-volatile store cycle
Standby
L
Read
H
HHH
L
Word Program
H
L
H
L
H
Page Erase
H
L
H
L
H
Mass Erase
H
L
H
Table 3-6 IFREN Truth Table
Mode
IFREN = 1
IFREN = 0
Read
Read information block
Read main memory block
Word program
Program information block
Program main memory block
Page erase
Erase information block
Erase main memory block
Mass erase
Erase both block
Erase main memory block
Data Invalid State
Data1
Data2 Valid
Data
Tri-stated
Data3 Valid
Data2
Data3
Data1 Valid
Data Active
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