參數(shù)資料
型號: EP4CGX110DF31I7N
廠商: Altera
文件頁數(shù): 34/42頁
文件大?。?/td> 0K
描述: IC CYCLONE IV FPGA 110K 896FBGA
產品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
Cyclone IV FPGA Family Overview
特色產品: Cyclone? IV FPGAs
標準包裝: 27
系列: CYCLONE® IV GX
LAB/CLB數(shù): 6839
邏輯元件/單元數(shù): 109424
RAM 位總計: 5621760
輸入/輸出數(shù): 475
電源電壓: 1.16 V ~ 1.24 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 896-BBGA
供應商設備封裝: 896-FBGA(31x31)
1–4
Chapter 1: Cyclone IV Device Datasheet
Operating Conditions
December 2013
Altera Corporation
Recommended Operating Conditions
This section lists the functional operation limits for AC and DC parameters for
Cyclone IV devices. Table 1–3 and Table 1–4 list the steady-state voltage and current
values expected from Cyclone IV E and Cyclone IV GX devices. All supplies must be
strictly monotonic without plateaus.
Table 1–3. Recommended Operating Conditions for Cyclone IV E Devices (1), (2) (Part 1 of 2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCCINT (3)
Supply voltage for internal logic,
1.2-V operation
1.15
1.2
1.25
V
Supply voltage for internal logic,
1.0-V operation
0.97
1.0
1.03
V
VCCIO (3), (4)
Supply voltage for output buffers,
3.3-V operation
3.135
3.3
3.465
V
Supply voltage for output buffers,
3.0-V operation
2.85
3
3.15
V
Supply voltage for output buffers,
2.5-V operation
2.375
2.5
2.625
V
Supply voltage for output buffers,
1.8-V operation
1.71
1.8
1.89
V
Supply voltage for output buffers,
1.5-V operation
1.425
1.5
1.575
V
Supply voltage for output buffers,
1.2-V operation
1.14
1.2
1.26
V
VCCA (3)
Supply (analog) voltage for PLL
regulator
2.375
2.5
2.625
V
VCCD_PLL (3)
Supply (digital) voltage for PLL,
1.2-V operation
1.15
1.2
1.25
V
Supply (digital) voltage for PLL,
1.0-V operation
0.97
1.0
1.03
V
VI
Input voltage
–0.5
3.6
V
VO
Output voltage
0
VCCIO
V
TJ
Operating junction temperature
For commercial use
0
85
°C
For industrial use
–40
100
°C
For extended temperature (5)
–40
125
°C
For automotive use
–40
125
°C
tRAMP
Power supply ramp time
Standard power-on reset
(POR) (6)
50 s
50 ms
Fast POR (7)
50 s
3 ms
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