Data Sheet
AD7923
Rev. D | Page 21 of 24
CS
SCLK
DOUT
DIN
t5
t11
t8
tQUIET
tCONVERT
1
2
3
4
5
6
11
12
13
14
15
16
THREE-
STATE
ZERO
ADD1
ADD0
DB11
DB10
DB4
DB3
DB2
DB1
DB0
THREE-
STATE
2 IDENTIFICATION
BITS
ZERO
B
WRITE
SEQ1
DONTC
ADD1
ADD0
CODING
DONTC
t9
t2
t3
t10
t6
t7
t4
03086-027
Figure 27. Serial Interface Timing Diagram
CS
1
16
1
16
1
16
SCLK
VALID DATA
DOUT
POWER-UP
DIN
tCYCLE 5s MIN
tQUIET MIN
03086-028
Figure 28. General Timing Diagram
MICROPROCESSOR INTERFACING
The serial interface on the AD7923 allows the part to be directly
connected to a range of many different microprocessors. This
section explains how to interface the AD7923 with some of the
more common microcontroller and DSP serial interface protocols.
AD7923-to-TMS320C541
The serial interface on the TMS320C541 uses a continuous
serial clock and frame synchronization signals to synchronize
the data transfer operations with peripheral devices like the
AD7923. The CS input allows easy interfacing between the
TMS320C541 and the AD7923 without any glue logic required.
The serial port of the TMS320C541 is set up to operate in burst
mode with internal CLKX0 (Tx serial clock on Serial Port 0)
and FSX0 (Tx frame sync from Serial Port 0). The serial port
control register (SPC) must have the following setup: FO = 0,
FSM = 1, MCM = 1, and TXM = 1. The connection diagram is
shown
in Figure 29. It should be noted that for signal processing
applications, it is imperative that the frame synchronization
signal from the TMS320C541 provides equidistant sampling.
The VDRIVE pin of the AD7923 takes the same supply voltage as
the TMS320C541. This allows the ADC to operate at a higher
voltage than the serial interface, that is, the TMS320C541, if
necessary.
TMS320C5411
AD79231
CLKX
CLKR
DR
DT
FSX
FSR
VDD
SCLK
DOUT
DIN
CS
1 ADDITIONAL PINS REMOVED FOR CLARITY.
03086-029
VDRIVE
Figure 29. Interfacing to the TMS320C541
AD7923-to-ADSP-21xx
The ADSP-21xx family of DSPs is interfaced directly to the
AD7923 without any glue logic required. The VDRIVE pin of the
AD7923 takes the same supply voltage as the ADSP-218x,
which allows the ADC to operate at a higher voltage than the
serial interface, that is, ADSP-218x, if necessary.
The SPORT0 control register should be set up as follows:
TFSW = RFSW = 1, alternate framing
INVRFS = INVTFS = 1, active low frame signal
DTYPE = 00, right justify data
SLEN = 1111, 16-bit data-words
ISCLK = 1, internal serial clock
TFSR = RFSR = 1, frame every word
IRFS = 0
ITFS = 1