參數(shù)資料
型號(hào)： EVAL-AD7923CBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 15/24頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD7923
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 12
采樣率（每秒）： 200k
數(shù)據(jù)接口： 串行
輸入范圍： 0 ~ 2.5 V
在以下條件下的電源（標(biāo)準(zhǔn)）： 7.5mW @ 200kSPS，5 V
工作溫度： -40°C ~ 125°C
已用 IC / 零件： AD7923
已供物品： 板，CD
相關(guān)產(chǎn)品： AD7923BRUZ-REEL7TR-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP
AD7923BRUZ-REEL-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP
AD7923BRUZ-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP
AD7923
Data Sheet
Rev. D | Page 22 of 24
The connection diagram is shown in Figure 30. The ADSP-218x
has the TFS and RFS of the SPORT tied together, with TFS set
as an output and RFS set as an input. The DSP operates in
alternate framing mode and the SPORT control register is set
up as described. The frame synchronization signal generated on
the TFS is tied to CS and, as with all signal processing applica-
tions, equidistant sampling is necessary. However, in this
example, the timer interrupt is used to control the sampling rate
of the ADC, and under certain conditions equidistant sampling
might not be achieved.
VDRIVE
AD79231
ADSP-218x1
SCLK
DR
RFS
TFS
DT
SCLK
DOUT
CS
DIN
1 ADDITIONAL PINS REMOVED FOR CLARITY.
VDD
03086-030
Figure 30. Interfacing to the ADSP-218x
The timer register, for instance, is loaded with a value that
provides an interrupt at the required sample interval. When an
interrupt is received, a value is transmitted with TFS/DT (ADC
control word). The TFS is used to control the RFS and therefore
the reading of data. The frequency of the serial clock is set in
the SCLKDIV register. When the instruction to transmit with
TFS is given (that is, AX0 = TX0), the state of the SCLK is
checked. The DSP waits until the SCLK has gone high, low, and
high before the transmission starts. If the timer and SCLK
values are chosen such that the instruction to transmit occurs
on or near the rising edge of SCLK, the data can be transmitted,
or it can wait until the next clock edge.
For example, if the ADSP-2189 has a 20 MHz crystal such that it
has a master clock frequency of 40 MHz, then the master cycle
time is 25 ns. If the SCLKDIV register is loaded with the value
3, then a SCLK of 5 MHz is obtained, and eight master clock
periods elapse for every SCLK period. Depending on the
throughput rate selected, if the timer registers are loaded with
the value 803, 100.5 SCLKs occur between interrupts and
subsequently between transmit instructions. This situation
results in nonequidistant sampling since the transmit
instruction occurs on a SCLK edge. If the number of SCLKs
between interrupts is an integer of N, equidistant sampling is
implemented by the DSP.
AD7923-to-DSP563xx
The connection diagram in Figure 31 shows how the AD7923
can be connected to the synchronous serial interface (ESSI) of
the DSP563xx family of DSPs from Motorola. Each ESSI (two
on board) is operated in synchronous mode (SYN bit in CRB =
1), with an internally generated word length frame sync for
both Tx and Rx (bits FSL1 = 0 and FSL0 = 0 in CRB). Normal
operation of the ESSI is selected by making MOD = 0 in the
CRB. Set the word length to 16 by setting bits WL1 = 1 and
WL0 = 0 in CRA. The FSP bit in the CRB should be set to 1 so
the frame sync is negative. It should be noted that for signal
processing applications, it is imperative that the frame synchro-
nization signal from the DSP563xx provides equidistant
sampling.
In the example shown in Figure 31, the serial clock is taken
from the ESSI, therefore the SCK0 pin must be set as an output,
SCKD = 1. The VDRIVE pin of the AD7923 takes the same supply
voltage as the DSP563xx, which allows the ADC to operate at a
higher voltage than the serial interface, that is, DSP563xx, if
necessary.
AD79231
DSP563xx1
SCK
SRD
STD
SC2
SCLK
DOUT
CS
DIN
VDRIVE
1 ADDITIONAL PINS REMOVED FOR CLARITY.
VDD
03086-031
Figure 31. Interfacing to the DSP563xx
相關(guān)PDF資料
PDF描述
AT-S-26-8/8/W-25-OE-R MOD CORD SGL-ENDED 8-8 WHITE 25'
NRS8030T1R0NJGJ INDUCTOR POWER 1.0UH 6.2A SMD
GCC28DCMT CONN EDGECARD 56POS .100" WW
EVAL-AD7899CBZ BOARD EVAL FOR AD7899
VI-BND-EY CONVERTER MOD DC/DC 85V 50W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-AD7927CB 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD. - Bulk
EVAL-AD7927CBZ 功能描述:BOARD EVALUATION FOR AD7927 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件
EVAL-AD7933CB 制造商:Analog Devices 功能描述:EVALUATION BOARD 4-CHANNEL, 1.5 MSPS, 10-BIT AND 12-BIT PARALLEL ADCS WITH A SEQUENCER 制造商:Analog Devices 功能描述:EVAL BD FOR 4-CH, 1.5 MSPS, 10-BIT AND 12-BIT PARALLEL ADCS - Bulk
EVAL-AD7934-6CB 制造商:Analog Devices 功能描述:EVAL BD 4-CH, 1.5 MSPS, 10-BIT AND 12-BIT PARALLEL ADCS W/ A - Bulk
EVAL-AD7934CB 制造商:Analog Devices 功能描述:Evaluation Board For 4-Channel, 1.5 MSPS, 10-Bit And 12-Bit Parallel ADCs With A Sequencer 制造商:Analog Devices 功能描述:EVAL BD 4-CH, 1.5 MSPS, 10-BIT AND 12-BIT PARALLEL ADCS W/ A - Bulk
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*