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參數(shù)資料
| 型號： | EVAL-AD7923CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD7923 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | 0 ~ 2.5 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 7.5mW @ 200kSPS，5 V |
| 工作溫度： | -40°C ~ 125°C |
| 已用 IC / 零件： | AD7923 |
| 已供物品： | 板，CD |
| 相關(guān)產(chǎn)品： | AD7923BRUZ-REEL7TR-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP AD7923BRUZ-REEL-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP AD7923BRUZ-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP |
Data Sheet
AD7923
Rev. D | Page 15 of 24
ADC TRANSFER FUNCTION
The output coding of the AD7923 is either straight binary or
twos complement, depending on the status of the LSB in the
control register. The designed code transitions occur at succes-
sive LSB values (for example, 1 LSB, 2 LSBs). The LSB size is
REFIN /4096 for the AD7923. The ideal transfer characteristic
for the AD7923 when straight binary coding is selected is
shown in Figure 16 and the ideal transfer characteristic for the
AD7923 when twos complement coding is selected is shown in
+VREF – 1LSB
000...000
0V
ANALOG INPUT
111...111
000...001
000...010
111...110
111...000
011...111
1LSB
1LSB = VREF/4096
NOTES
1. VREF IS EITHER REFIN OR 2 × REFIN
ADC
CODE
03086-016
Figure 16. Straight Binary Transfer Characteristic
–VREF + 1LSB
ADC
CODE
ANALOG INPUT
+VREF – 1LSB
1LSB = 2
× V
REF/4096
VREF – 1LSB
100...000
011...111
100...001
100...010
011...110
000...001
111...111
000...000
03086-017
Figure 17. Twos Complement Transfer Characteristic
with REFIN ± REFIN Input Range
Handling Bipolar Input Signals
Figure 18 shows how useful the combination of the 2 × REFIN
input range and the twos complement output coding scheme is
for handling bipolar input signals. If the bipolar input signal is
biased around REFIN and twos complement output coding is
selected, then REFIN becomes the zero-code point, REFIN is
negative full scale, and + REFIN becomes positive full scale with
a dynamic range of 2 × REFIN.
R3
R2
R4
REFIN
VIN0
VIN3
AD7923
DSP/
P
VDD
0.1
F
V
AVDD
VDRIVE
DOUT
TWOS
COMPLEMENT
+REFIN
REFIN
–REFIN
011...111
000...000
100...000
(= 0V)
(= 2
× REF
IN)
0V
V
R1
R1 = R2 = R3 = R4
VDD
VREF
03086-018
Figure 18. Handling Bipolar Signals
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