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參數(shù)資料
| 型號： | EVAL-AD7923CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD7923 |
| 標準包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | 0 ~ 2.5 V |
| 在以下條件下的電源（標準）： | 7.5mW @ 200kSPS，5 V |
| 工作溫度： | -40°C ~ 125°C |
| 已用 IC / 零件： | AD7923 |
| 已供物品： | 板，CD |
| 相關產(chǎn)品： | AD7923BRUZ-REEL7TR-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP AD7923BRUZ-REEL-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP AD7923BRUZ-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP |
Data Sheet
AD7923
Rev. D | Page 3 of 24
SPECIFICATIONS
AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
B Version1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
fIN = 50 kHz sine wave, fSCLK = 20 MHz
Signal-to-(Noise + Distortion) (SINAD)2
70
dB min
@ 5 V, –40°C to +85°C
69
dB min
@ 5 V, 85°C to 125°C, typ 70 dB
69
dB min
@ 3 V typ 70 dB, –40°C to +125°C
Signal-to-Noise (SNR)2
70
dB min
Total Harmonic Distortion (THD)2
77
dB max
@ 5 V typ, 84 dB
73
dB max
@ 3 V typ,77 dB
Peak Harmonic or Spurious Noise
78
dB max
@ 5 V typ, 86 dB
(SFDR)2
76
dB max
@ 3 V typ, 80 dB
Intermodulation Distortion (IMD)2
fA = 40.1 kHz, fB = 41.5 kHz
Second Order Terms
90
dB typ
Third Order Terms
90
dB typ
Aperture Delay
10
ns typ
Aperture Jitter
50
ps typ
Channel-to-Channel Isolation
85
dB typ
fIN = 400 kHz
Full Power Bandwidth
8.2
MHz typ
@ 3 dB
1.6
MHz typ
@ 0.1 dB
DC ACCURACY2
Resolution
12
Bits
Integral Nonlinearity
±1
LSB max
Differential Nonlinearity
0.9/+1.5
LSB max
Guaranteed no missed codes to 12 bits
0 V to REFIN Input Range
Straight binary output coding
Offset Error
±8
LSB max
Typ ±0.5 LSB
Offset Error Match
±0.5
LSB max
Gain Error
±1.5
LSB max
Gain Error Match
±0.5
LSB max
0 V to 2 × REFIN Input Range
REFIN to +REFIN biased about REFIN with twos
complement output coding
Positive Gain Error
±1.5
LSB max
Positive Gain Error Match
±0.5
LSB max
Zero-Code Error
±8
LSB max
Typ ±0.8 LSB
Zero-Code Error Match
±0.5
LSB max
Negative Gain Error
±1
LSB max
Negative Gain Error Match
±0.5
LSB max
ANALOG INPUT
Input Voltage Range
0 to REFIN
V
Range bit set to 1
0 to 2 × REFIN
V
Range bit set to 0, AVDD = 4.75 V to 5.25 V
DC Leakage Current
±1
A max
Input Capacitance
20
pF typ
REFERENCE INPUT
REFIN Input Voltage
2.5
V
±1% specified performance
DC Leakage Current
±1
A max
REFIN Input Impedance
36
k typ
fSAMPLE = 200 kSPS
LOGIC INPUTS
Input High Voltage, VINH
0.7 × VDRIVE
V min
Input Low Voltage, VINL
0.3 × V
V max
Input Current, IIN
±1
A max
Typ 10 nA, VIN = 0 V or VDRIVE
Input Capacitance, CIN3
10
pF max
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