- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375916 > FS7VS-5 (Mitsubishi Electric Corporation) HIGH-SPEED SWITCHING USE PDF資料下載
參數(shù)資料
| 型號(hào)： | FS7VS-5 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | HIGH-SPEED SWITCHING USE |
| 中文描述： | 高速開關(guān)使用 |
| 文件頁數(shù)： | 9/91頁 |
| 文件大?。?/td> | 488K |
| 代理商： | FS7VS-5 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁
PSD9XX Family
PSD935G2
8
The following table describes the pin names and pin functions of the PSD935G2. Pins that
have multiple names and/or functions are defined using PSD Configuration.
6.0
Table 5.
PSD935G2
Pin
Descriptions
Pin*
(TQFP
Pkg.)
Pin Name
Type
Description
ADIO0-7
3-7
10-12
I/O
This is the lower Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where the
data is multiplexed with the lower address bits, connect
AD[0:7] to this port.
2. If your MCU does not have a multiplexed address/data bus,
connect A[0:7] to this port.
3. If you are using an 80C51XA in burst mode, connect
A4/D0 through A11/D7 to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional blocks
was selected. The addresses on this port are passed to the
PLDs.
ADIO8-15
13-20
I/O
This is the upper Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where the
data is multiplexed with the lower address bits, connect
A[8:15] to this port.
2. If your MCU does not have a multiplexed address/data bus,
connect A[8:15] to this port.
3. If you are using an 80C251 in page mode, connect AD[8:15]
to this port
4. If you are using an 80C51XA in burst mode, connect
A[12:19] to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional
blocks was selected. The addresses on this port are passed
to the PLDs.
CNTL0
59
I
The following control signals can be connected to this port,
based on your MCU:
1. WR — active-low write input.
2. R_W — active-high read/active low write input.
This pin is connected to the PLDs. Therefore, these signals can
be used in decode and other logic equations.
CNTL1
60
I
The following control signals can be connected to this port,
based on your MCU:
1. RD — active-low read input.
2. E — E clock input.
3. DS — active-low data strobe input.
4. PSEN — connect PSEN to this port when it is being used as
an active-low read signal. For example, when the 80C251
outputs more than 16 address bits, PSEN is actually the read
signal.
This pin is connected to the PLDs. Therefore, these signals can
be used in decode and other logic equations.
CNTL2
40
I
This pin can be used to input the PSEN (Program Select
Enable) signal from any MCU that uses this signal for code
exclusively. If your MCU does not output a Program Select
Enable signal, this port can be used as a generic input. This
port is connected to the PLD as input.
Active low input. Resets I/O Ports, PLD Micro
Cells, some of
the configuration registers and JTAG registers. Must be active
at power up. Reset also aborts the Flash programming/erase
cycle that is in progress.
Reset
39
I
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD935F3V-15B81 | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD935F3V-15B81I | Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 30000uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-0.1pF; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: Solder Coated (Sn/Pb, 70/30); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: S Failure Rate |
| PSD935F3V-15J | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD935F3V-15JI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD935F3V-15M | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FS-8000 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:MULTI-USER KVM SWITCH |
| FS-80-0-300V | 制造商:Fuji Electric 功能描述: |
| FS800R06KE3_H7E | 制造商:Infineon Technologies AG 功能描述: |
| FS800R07A2E3 | 功能描述:IGBT 模塊 IGBT Module 650V 700A RoHS:否 制造商:Infineon Technologies 產(chǎn)品:IGBT Silicon Modules 配置:Dual 集電極—發(fā)射極最大電壓 VCEO:600 V 集電極—射極飽和電壓:1.95 V 在25 C的連續(xù)集電極電流:230 A 柵極—射極漏泄電流:400 nA 功率耗散:445 W 最大工作溫度:+ 125 C 封裝 / 箱體:34MM 封裝: |
| FS800R07A2E3BOSA2 | 制造商:Infineon Technologies AG 功能描述:Trans IGBT Module N-CH 650V 700A 33-Pin |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。