參數(shù)資料
型號： GS9092-CNE3
廠商： Gennum Corporation
英文描述： GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
中文描述： GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內
文件頁數(shù)： 25/58頁
文件大?。?/td> 608K
代理商： GS9092-CNE3
GS9092 Data Sheet
28202 - 2
September 2005
25 of 58
3.3.2.1 FIFO Status Flags
The FIFO contains internal read and write pointers used to designate which spot in
the FIFO the MPEG data will be read from or written to. These internal pointers
control the status flags FIFO_FULL and FIFO_EMPTY, which are available for
output on the multi-function I/O pins if so programmed (see
Programmable
Multi-function I/O on page 46
).
In the case where the write pointer is originally ahead of the read pointer, the
FIFO_EMPTY flag will be set HIGH when both pointers arrive at the same address
(see box A of
Figure 3-6
). When the FIFO_EMPTY flag goes HIGH, the device will
insert K28.5 stuffing data bytes.
To allow larger K28.5 packet sizes to be inserted, a write pointer offset can be
programmed into the FIFO_EMPTY_OFFSET[9:0] register of the host interface. If
an offset value is programmed in this register, the FIFO_EMPTY flag is set HIGH
when the read and write pointers of the FIFO are at the same address, and will
remain HIGH until the write pointer reaches the programmed offset. While the
FIFO_EMPTY flag is HIGH, the device will continue to insert stuffing characters.
Once the pointer offset has been exceeded, the FIFO_EMPTY flag will go LOW
and the device will begin reading MPEG data out of the FIFO (see box B of
Figure 3-6
).
In the case where the read pointer is originally ahead of the write pointer, the
FIFO_FULL flag will be set HIGH when both pointers arrive at the same address
(see box C of
Figure 3-6
). The application layer can use this flag to determine when
to write to the device.
A read and write pointer offset may also be programmed in the
FIFO_FULL_OFFSET[9:0] register of the host interface. If an offset value is
programmed in this register, the FIFO_FULL flag will be set HIGH when the read
and write pointers of the FIFO are at the same address, and will remain set HIGH
until the read pointer reaches the programmed offset. Once the pointer offset has
been exceeded, the FIFO_FULL flag will be cleared (see box D of
Figure 3-6
).
NOTE: When the FIFO is configured for DVB-ASI mode, the INSSYNCIN pin is
unused, as synchronization characters are inserted based on the FIFO status
flags. The pin should be grounded. When the internal FIFO is bypassed in
DVB-ASI mode, the INSSYNCIN input assumes normal operation as described in
Control Signal Inputs on page 33
.
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