參數(shù)資料
型號(hào)： GS9092-CNE3
廠商： Gennum Corporation
英文描述： GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
中文描述： GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內(nèi)
文件頁數(shù)： 33/58頁
文件大?。?/td> 608K
代理商： GS9092-CNE3
GS9092 Data Sheet
28202 - 2
September 2005
33 of 58
Figure 3-8: H, V, and F Input Timing
3.5 DVB-ASI Mode
The GS9092 is said to be in DVB-ASI mode when the application layer sets the
DVB_ASI pin HIGH.
In this mode, all SMPTE processing functions are disabled, and the 8-bit transport
stream data will be 8b/10b encoded prior to serialization.
3.5.1 Control Signal Inputs
In DVB-ASI mode, the DIN9 and DIN8 will be configured as DVB-ASI control
signals INSSYNCIN and K_IN respectively.
When INSSYNCIN is set HIGH, the device will insert K28.5 sync characters into
the data stream. This function is used to assist system implementations where the
GS9092's internal FIFO is disabled (FIFO_EN = LOW), and the device is preceded
by an external FIFO. Parallel data may be clocked into the external FIFO at some
rate less than 27MHz. The INSSYNCIN input may then be connected to the FIFO
empty signal, thus providing a means of padding up the data transmission rate to
27MHz.
NOTE 1: If the internal FIFO is enabled (FIFO_EN = HIGH), the INSSYNCIN pin
should be grounded (see
DVB-ASI Mode on page 24
).
NOTE 2: In DVB-ASI mode, 8b/10b encoding will take place after K28.5 sync
character insertion.
K_IN should be set HIGH whenever the parallel data input is to be interpreted as
any special character (including the K28.5 sync character), defined by the
DVB-ASI standard. This pin should be set LOW when the input is to be interpreted
as data.
Y/Cr/Cb DATA INPUT
PCLK
H
V
F
XYZ
000
000
3FF
XYZ
000
000
3FF
H SIGNAL TIMING:
H_CONFIG = LOW
H_CONFIG = HIGH
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