參數(shù)資料
型號： GS9092-CNE3
廠商： Gennum Corporation
英文描述： GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
中文描述： GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內(nèi)
文件頁數(shù)： 44/58頁
文件大?。?/td> 608K
代理商： GS9092-CNE3
GS9092 Data Sheet
28202 - 2
September 2005
44 of 58
6
FF-EDA
Full Field Error Detected Already flag will be generated and
inserted when IOPROC_EN and SMPTE_BYPASS pins are
HIGH and EDH_CRC_INS bit is LOW.
NOTE: When EDH_CRC_UPDATE is set HIGH, this bit is
read-only, and will be updated by the device.
R/W
0
5
FF-EDH
Full Field Error Detected Here flag will be generated and
inserted when IOPROC_EN and SMPTE_BYPASS pins are
HIGH and EDH_CRC_INS bit is LOW.
NOTE: When EDH_CRC_UPDATE is set HIGH, this bit is
read-only, and will be updated by the device.
R/W
0
4
AP-UES
Active Picture Unknown Error Status flag will be generated and
inserted when IOPROC_EN and SMPTE_BYPASS pins are
HIGH and EDH_CRC_INS bit is LOW.
NOTE: When EDH_CRC_UPDATE is set HIGH, this bit is
read-only, and will be updated by the device.
R/W
0
3
AP-IDA
Active Picture Internal device error Detected Already flag will be
generated and inserted when IOPROC_EN and
SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is
LOW.
NOTE: When EDH_CRC_UPDATE is set HIGH, this bit is
read-only, and will be updated by the device.
R/W
0
2
AP-IDH
Active Picture Internal device error Detected Here flag will be
generated and inserted when IOPROC_EN and
SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is
LOW.
NOTE: When EDH_CRC_UPDATE is set HIGH, this bit is
read-only, and will be updated by the device.
R/W
0
1
AP-EDA
Active Picture Error Detected Already flag will be generated and
inserted when IOPROC_EN and SMPTE_BYPASS pins are
HIGH and EDH_CRC_INS bit is LOW.
NOTE: When EDH_CRC_UPDATE is set HIGH, this bit is
read-only, and will be updated by the device.
R/W
0
0
AP-EDH
Active Picture Error Detected Here flag will be generated and
inserted when IOPROC_EN and SMPTE_BYPASS pins are
HIGH and EDH_CRC_INS bit is LOW.
NOTE: When EDH_CRC_UPDATE is set HIGH, this bit is
read-only, and will be updated by the device.
R/W
0
Table 3-8: Host Interface Description for EDH Flag Register (Continued)
Register Name
Bit
Name
Description
R/W
Default
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