參數資料
型號： HC05JB4GRS
英文描述： 68HC(7)05JB4 General Release Specification
中文描述： 68HC（7）05JB4總發(fā)行規(guī)格
文件頁數： 40/106頁
文件大?。?/td> 1366K
代理商： HC05JB4GRS
GENERAL RELEASE SPECIFICATION
July 16, 1999
MOTOROLA
6-2
LOW POWER MODES
For More Information On This Product,
Go to: www.freescale.com
MC68HC05J5A
REV 2.1
Figure 6-1. STOP/HALT/WAIT Flowcharts
6.1
STOP INSTRUCTION
The STOP instruction can result in one of two modes of operation depending on
the STOP mask option chosen. One option is for the STOP instruction to operate
like the STOP in normal MC68HC05 family members and place the device in the
1.
Fetch Reset Vector
or
Service Interrupt
a.
Stack
b.
Set I-Bit
c.
Vector to Interrupt Routine
2.
WAIT
Stop
Conversion to
Halt
Y
N
External
RESET
Y
N
IRQ
External
Interrupt
Y
N
Stop External Oscillator,
Stop Internal Timer Clock,
Reset Startup Delay
Restart External Oscillator,
start Stabilization Delay
Stop Internal Processor Clock,
Clear I-Bit in CCR,
and set IRQE in ICSR
End
of Stabilization
Delay
Y
N
IRQ
External
Interrupt
Y
N
External Oscillator Active
and
Internal Timer Clock Active
Restart
Internal Processor Clock
TIMER
Internal
Interrupt
Y
N
External
RESET
Y
N
STOP
HALT
External
RESET
Y
N
IRQ
External
Interrupt
Y
N
External Oscillator Active
and
Internal Timer Clock Active
TIMER
Internal
Interrupt
Y
N
COP
Internal
RESET
Y
N
COP
Internal
RESET
Y
N
Stop Internal Processor Clock,
Clear I-Bit in CCR,
and set IRQE in ICSR
Stop Internal Processor Clock,
Clear I-Bit in CCR,
and set IRQE in ICSR
F
Freescale Semiconductor, Inc.
n
.
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