參數(shù)資料
型號： HC05JB4GRS
英文描述： 68HC(7)05JB4 General Release Specification
中文描述： 68HC（7）05JB4總發(fā)行規(guī)格
文件頁數(shù)： 76/106頁
文件大?。?/td> 1366K
代理商： HC05JB4GRS
GENERAL RELEASE SPECIFICATION
July 16, 1999
MOTOROLA
10-8
INSTRUCTION SET
MC68HC05J5A
REV 2.1
10.1.15 Instruction Set Summary
Table 10-6
is an alphabetical list of all M68HC05 instructions and shows the effect
of each instruction on the condition code register.
Table 10-6. Instruction Set Summary
Source
Form
Operation
Description
Effect on
CCR
A
IMM
DIR
EXT
IX2
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
M
O
O
ii
dd
hh ll
ee ff
ff
C
H I N Z C
ADC #opr
ADC opr
ADC opr
ADC oprX
ADC oprX
ADC ,X
ADD #opr
ADD opr
ADD opr
ADD oprX
ADD oprX
ADD ,X
AND #opr
AND opr
AND opr
AND oprX
AND oprX
AND ,X
ASL opr
ASLA
ASLX
ASL oprX
ASL ,X
ASR opr
ASRA
ASRX
ASR oprX
ASR ,X
Add with Carry
A
←
(A) + (M) + (C)
¤
—
¤
¤
¤
A9
B9
C9
D9
E9
F9
AB
BB
CB
DB
EB
FB
A4
B4
C4
D4
E4
F4
38
48
58
68
78
37
47
57
67
77
2
3
4
5
4
3
2
3
4
5
4
3
2
3
4
5
4
3
5
3
3
6
5
5
3
3
6
5
Add without Carry
A
←
(A) + (M)
¤
—
¤
¤
¤
ii
dd
hh ll
ee ff
ff
Logical AND
A
←
(A)
∧
(M)
— —
¤
¤
—
ii
dd
hh ll
ee ff
ff
Arithmetic Shift Left
(Same as LSL)
— —
¤
¤
¤
¤
dd
ff
Arithmetic Shift Right
— —
¤
¤
¤
DIR
INH
INH
IX1
IX
dd
ff
BCC rel
Branch if Carry Bit
Clear
PC
←
(PC) + 2 + rel C = 0
— — — — —
REL
24
rr
3
BCLR n opr
Clear Bit n
Mn
←
0
— — — — —
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
11
13
15
17
19
1B
1D
1F
dd
dd
dd
dd
dd
dd
dd
dd
5
5
5
5
5
5
5
5
BCS rel
Branch if Carry Bit
Set (Same as BLO)
Branch if Equal
PC
←
(PC) + 2 + rel C = 1
— — — — —
REL
25
rr
3
BEQ rel
PC
←
(PC) + 2 + rel Z = 1
— — — — —
REL
27
rr
3
C
b0
b7
0
b0
b7
C
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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