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參數(shù)資料
| 型號： | HPC |
| 文件頁數(shù)： | 28/30頁 |
| 文件大?。?/td> | 361K |
| 代理商： | HPC |
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Memory Usage
(Continued)
Register Indirect Instructions with Auto Increment and Decrement
Register B with Skip
(B
a
)
(B
b
)
LDS A,
*
XS A,
*
1
1
1
1
Register X
(X
a
)
(X
b
)
LD A,
*
X A,
*
1
1
1
1
Instruction Using A and C
CLR
INC
DEC
COMP
SWAP
RRC
RLC
SHR
SHL
SC
RC
IFC
IFNC
A
A
A
A
A
A
A
A
A
1
1
1
1
1
1
1
1
1
1
1
1
1
Stack Reference Instructions
Direct
PUSH
POP
2
2
Transfer of Control Instructions
JSRP
JSR
JSRL
JP
JMP
JMPL
JID
JIDW
NOP
RET
RETSK
RETI
1
2
3
1
2
3
1
1
1
1
1
1
Code Efficiency
One of the most important criteria of a single chip microcon-
troller is code efficiency. The more efficient the code, the
less memory support required. More integration is possible if
the die is not consumed with memory or for external memo-
ry designs, production cost is lower with fewer memory ele-
ments.
The HPC core has been designed to be extremely code-effi-
cient. Standard products developed around the core look
very good in all the standard coding benchmarks. Many
large jobs have been programmed using the HPC core, and
the code savings over other popular microcontrollers has
been considerable-often the jobs take less than one-half
the memory.
Reasons for this saving of code include the following:
Single Byte Instructions
The majority of instructions on the HPC core are single byte.
Two instructions are particularly code-efficient:
JP is a 1-byte jump. The jump must be within a range of plus
or minus 32 bytes. This is a valuable instruction, since many
loops and decisions are often within a small range of pro-
gram memory. Most other micros need 2-byte instructions
for any short jumps.
JRSP is a 1-byte subroutine call. The user makes a table of
his 16 most frequently called subroutines and these calls
will only take one byte. Most other micros require two and
even three bytes to call a subroutine. The user does not
have to decide which subroutine addresses to put into his
table; the assembler can give him this information.
Efficient Subroutine Calls
The 2-byte JSR instruction can call any subroutine within
plus or minus 1k of program memory.
Multifunction Instructions for Data
Movement and Program Looping
The HPC core has single-byte instructions that perform mul-
tiple tasks. For example, the XS instruction will do the fol-
lowing:
1. Exchange A and memory location pointed to by the B
register.
2. Increment the B register.
3. Compare the B register versus the K register.
4. Generate a conditional skip if B is greater than K.
The value of this multipurpose instruction becomes evident
when looping through sequential areas of memory and exit-
ing when the loop is finished.
Bit Manipulation Instructions
Any bit of memory, I/O or register can be set, reset or test-
ed by the single byte bit instructions. The bits can be ad-
dressed directly or indirectly. Since all registers and I/O are
mapped into the memory, it is very easy to manipulate spe-
cific bits to do efficient control.
The one exception to the above is with the IRPD register. A
LOAD IMMEDIATE instruction is to be the only instruction
used to clear a bit or bits in this register (see Interrupt Pend-
ing Register section).
28
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