參數(shù)資料
型號(hào)： HPC
文件頁(yè)數(shù)： 29/30頁(yè)
文件大小： 361K
代理商： HPC
Decimal Add and Subtract
This instruction is needed to interface with the decimal user
world.
It can handle both 16-bit words and 8-bit bytes.
The 16-bit capability saves code since many variables can
be stored as one piece of data and the progarmmer does
not have to break his data into two bytes. Many applications
store most data in 4-digit variables. The HPC core supplies
8-bit byte capability for 2-digit variables and literal variables.
Multiply and Divide Instructions
The HPC core has 16-bit multiply, 16-bit by 16-bit divide,
and 32-bit by 16-bit divide instructions. This saves both
code and time. Multiply and divide can use immediate data
or data from memory. The ability to multiply and divide by
immediate data saves code since this function is often
needed for scaling base conversion, computing indexes of
arrays, etc.
Development Support
Schematic Capture
Schematic capture of designs using the HPC Megacell is
available on ASIC supported workstations and the main-
frame computer system. Confer with Marketing for the li-
brary revision which contains the HPC Megacell on individu-
al workstations.
Software Tools
Several software tools are available to aid the design pro-
cess. An event driven simulation software package is avail-
able on the mainframe computer system. A behavioral mod-
el of the HPC core is present to support netlist simulation.
Writing HPC software in a test vector format is very cumber-
some. To alleviate this struggle, a software package exists
to convert HPC Assembler code to a format familiar to the
simulator. Along with the HPC code conversion, I/O pin
stimulus may be included to execute synchronously with a
designated HPC instruction. The conversion software cre-
ates a HILO ROM model to hold the HPC code and an I/O
stimulus model for the input pin test vectors.
Simulation Procedure
An important part of cell based design is simulation. To con-
firm proper HPC connection and design verification, HPC
code for device testing will be written by the designer. Typi-
cally, this code will not be the code written to execute the
application. Rather, it will be specifically written to exercise
the design for test purposes in the most efficient manner as
possible. Instead of writing HPC code in a binary format, it is
recommended that the HPC assembler to simulation test
format conversion software be utilized.
When using the conversion software approach, a superlevel
drawing of the cell based design must be created. This
drawing page is a diagram of the standard cell device, the
test ROM model and the I/O pin stimulus model. The ROM
model may be generated as an internal or external ROM for
the cell based device. This schematic page shows the inter-
action between these three blocks. A netlist from this level
is used for the simulation. Thus, the stimulus models appear
in the design netlist. When simulation is complete, only the
netlist of the cell based design is considered for place and
route. Refer to the HPC Megacell user’s guide for more de-
tails on HPC simulation.
Emulation
The MOLE
TM
(Microcontroller On-Line Emulator) is a low
cost development system and emulator for all microcontrol-
ler products. These include COPs, TMP, 8050U and the
HPC Family of products. The MOLE consists of a Brain
Board, Personality Board and optional host software.
The purpose of a MOLE is to provide the user with a tool to
write and assemble code, emulate code for the target micro-
controller, and assist in both the software and hardware de-
bugging of the system. It is a self-contained computer with
its own firmware which provides for all system operation,
emulation control, communication, PROM programming and
diagnostic operations.
The MOLE contains three serial ports. Multiple ports are
usually needed to optionally connected to a terminal, a host
system, a printer or modem, or to other MOLEs in a multi-
MOLE environment. MOLE can be used in either a stand
alone mode or in conjunction with selected host systems,
i.e., those using CP/M or PC-DOS, communicating via RS-
232 port.
The MOLE product line may be used with cell based IC
development of HPC designs. A 68-pin package of the HPC
core Megacell has been created to operate in the HPC Per-
sonality Board. When a standard product HPC design is em-
ulated, a connection between the MOLE board and the us-
er’s target system is made. This allows interaction between
the emulator and the application system. In a cell based
design, the integrated circuit will contain more than the HPC
core. To accurately emulate the core in the user’s system a
bread board of the logic surrounding the HPC core must be
created. The MOLE board would connect directly to the
bread board, which would connect into the target sys-
tem. The MOLE system will perform the same function as
done in the emulation of the standard family product.
To improve the accuracy of bread board emulations Nation-
al will provide ‘‘kit parts’’ of all cell macros not available as
standard products.
Dial-A-Helper is a service provided by the MOLE applica-
tions group. If a user is having difficulty in getting a MOLE to
operate in a particular mode or it is acting in a peculiar man-
ner, they can contact us via their system and modem. They
can leave messages on our electronic bulletin board which
we will respond to, or they can arrange for us to actually
take control of their system via modem for debugging pur-
poses.
The applications group can then force their system to exe-
cute various commands and try to resolve the customer’s
problem by actually getting the customer’s system to re-
spond. The problem is solved 99% of the time. This allows
us to respond in minutes instead of days when applications
help is needed.
The system can also be used to download available applica-
tions software.
Packaging
The HPC core Megacell requires a minimum of 30 I/O pins
for testing purposes. In addition, 4 power pairs are required.
Therefore, the cell based design may be put in any available
package greater than 38 pins.
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