參數(shù)資料
型號(hào)： HYB18T256160AF-3
廠商： INFINEON TECHNOLOGIES AG
英文描述： 256 Mbi t DDR2 SDRAM
中文描述： 256姆噸DDR2內(nèi)存
文件頁(yè)數(shù)： 25/90頁(yè)
文件大?。?/td> 1246K
代理商： HYB18T256160AF-3
HYB18T256400/800/160AF
256Mb DDR2 SDRAM
INFINEON Technologies
Page 25 Rev. 1.02 May 2004
ODT Timing for Active and Standby
(Idle) Modes
(Synchronous ODT timings)
ODT Timing for Precharge Power-Down and Active Power-Down Mode (with slow exit)
(Asynchronous ODT timings)
3) ODT turn off time min. (tAOF,min) is when the device starts to turn off the ODT resistance.ODT turn off time max. (tAOF,max) is
when the bus is in high impedance. Both are measured from tAOFD.
1) Synchronous ODT timings apply for Active Mode and Standby Mode with CKE “high” and for the “Fast Exit” Active Power Down
Mode (MRS bit A12 set to “0”).
In all these modes the on-die DLL is enabled.
2) ODT turn-on time (tAON,min) is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on
time max. (tAON,max) is when the ODT resistance is fully on. Both are measured from tAOND.
CKE
DQ
ODT01
ODT
CK, CK
see note 1
Rtt
tAOF(min)
tAON(min)
tAON(max)
tAOF(max)
tAOND (2 tck)
tAOFD (2.5 tck)
t
IS
t
IS
T0
T1
T2
T3
T4
T5
T6
T7
T8
1) Asynchronous ODT timings apply for Precharge Power-Down Mode and “Slow Exit” Active Power Down Mode (MRS bit A12 set to
“1”), where the on-die DLL is disabled in this mode of operation.
tAOFPD,min
tAOFPD,max
CKE
DQ
ODT
ODT02
CK, CK
"low"
T0
T1
T2
T3
T4
T5
T6
T7
T8
t
IS
t
IS
Rtt
tAONPD,min
tAONPD,max
相關(guān)PDF資料
PDF描述
HYB18T256160AF-37 256 Mbi t DDR2 SDRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB18T256400AF-3.7 制造商:Infineon Technologies AG 功能描述:64M X 4 DDR DRAM, 0.5 ns, PBGA60
HYB18T256400AF-5 制造商:Infineon Technologies AG 功能描述:SDRAM, DDR, 64M x 4, 60 Pin, Plastic, BGA
HYB18T256800AF-5 制造商:Infineon Technologies AG 功能描述:
HYB18T512161BF-25 制造商:Qimonda 功能描述:SDRAM, DDR, 32M x 16, 84 Pin, Plastic, BGA
HYB18T512400AF-5 制造商:Intersil Corporation 功能描述:SDRAM, DDR, 128M x 4, 60 Pin, Plastic, BGA
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