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| 型號： | IBM25405GP-3BA200C2 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RISC PROCESSOR, PBGA456 |
| 封裝： | PLASTIC, BGA-456 |
| 文件頁數(shù)： | 2/48頁 |
| 文件大?。?/td> | 649K |
| 代理商： | IBM25405GP-3BA200C2 |
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PowerPC 405GP Embedded Controller
Data Sheet
Advance Information
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 10 of 48
galdsh5f
06/15/99 Preliminary
UART
Features of the UART include:
One 8-pin UART and one 4-pin UART interface provided
Selectable internal or external serial clock to allow wide range of baud rates
Register compatibility with NS16550 register set
Complete status reporting capability
Transmitter and receiver are each buffered with16-byte FIFOs when in FIFO mode
Fully programmable serial-interface characteristics
Support DMA using internal DMA engine
IIC Bus Interface
I2C (IIC) interface features:
Compliant with Philips Semiconductors I2C Specication, dated 1995
100kHz or 400 kHz operation
8-bit data
10- or 7-bit address
Slave transmitter and receiver
Master transmitter and receiver
Multiple bus masters
Supports xed Vdd I
2C interface
Two independent 4 x 1 byte data buffers
Twelve memory-mapped, fully programmable conguration registers
One programmable interrupt request signal
Provides full management of all I2C bus protocol
Programmable error recovery
General Purpose (GPIO) IO Controller
Controller functions and GPIO registers are programmed and accessed via memory-mapped OPB bus
master accesses
All GPIOs are pin-shared with other functions. DCR Registers control whether a particular pin that has
GPIO capabilities acts as a GPIO or is used for another purpose. Twenty-three GPIOs are multiplexed
with:
-
7 of 8 chip selects
-
All seven external interrupts
-
All nine instruction trace pins
Each GPIO output is separately programmable to emulate an open drain driver (i.e., drives to zero,
three-stated if output bit is 1)
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