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參數(shù)資料
| 型號： | IDT74CV105BPV |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 19/21頁 |
| 文件大小： | 94K |
| 代理商： | IDT74CV105BPV |
COMMERCIALTEMPERATURERANGE
IDTCV105B
CLOCKGENERATORFORDESKTOPPCPLATFORMS
7
BYTE 0: DUMMY BYTE
BYTE 1
Bit
Output(s)Affected
Description/Function
0
1
Type
Power On
7
Reserve
0
6
Reserve
0
5
SS_EN
Spreadspectrumenable
On
Off
RW
1
4
Reserve
0
3
SRCT, SRCC
Outputenable
Tristate
Enable
RW
1
2
CPUT_ITP, CPUC_ITP
Outputenable
Tristate
Enable
RW
1
CPUT1, CPUC1
Outputenable
Tristate
Enable
RW
1
0
CPUT0, CPUC0
Outputenable
Tristate
Enable
RW
1
BYTE 2
Bit
Output(s)Affected
Description/Function
0
1
Type
Power On
7
SRCT
SRCT Powerdown drive mode
Driven in power down
Tristateinpowerdown
RW
0
6
Reserve
0
5
CPUT1, 0
CPUT Powerdown drive mode
Driven in power down
Tristateinpowerdown
RW
0
4
Reserve
0
3
3V66_2
Outputenable
Tristate
Enable
RW
1
2
Reserve
1
Reserve
1
0
Reserve
1
BYTE 3
Bit
Output(s)Affected
Description/Function
0
1
Type
Power On
7
Reserve
0
6
Reserve
RW
1
5
PCI5
Outputenable
Tristate
Enable
RW
1
4
PCI4
Outputenable
Tristate
Enable
RW
1
3
PCI3
Outputenable
Tristate
Enable
RW
1
2
PCI2
Outputenable
Tristate
Enable
RW
1
PCI1
Outputenable
Tristate
Enable
RW
0
PCI0
Outputenable
Tristate
Enable
RW
1
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