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參數(shù)資料
| 型號： | IDT74CV105BPV |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 21/21頁 |
| 文件大?。?/td> | 94K |
| 代理商： | IDT74CV105BPV |
COMMERCIALTEMPERATURERANGE
IDTCV105B
CLOCKGENERATORFORDESKTOPPCPLATFORMS
9
BYTE 8 (READ BYTE COUNT REGISTER)
Bit
Output(s)Affected
Description/Function
0
1
Type
Power On
7
Reserve
0
6
BC6
See note 1
0
5
BC5
0
4
BC4
0
3
BC3
1
2
BC2
0
1
BC1
0
BC0
1
NOTE:
1. Can be written by index block write or OneCycle block read. See SM BUS PROTOCOL tables.
BYTES 9-20: DUMMY BYTES
BYTE 21
Bit
Output(s)Affected
Description/Function
0
1
Type
Power On
7
PCIFStr1
AGP/PCI STRENGTH table
1
6
PCIFStr0
AGP/PCI STRENGTH table
1
5
Reserve
1
4
Reserve
1
3
Reserve
1
2
Reserve
1
3V66Str1
AGP/PCI STRENGTH table
1
0
3V66Str0
AGP/PCI STRENGTH table
1
BYTE 22
Bit
Output(s)Affected
Description/Function
0
1
Type
Power On
7
REFStr1
REF STRENGTH table
1
6
REFStr0
REF STRENGTH table
0
5
PCIStrC1
PCI[7:5] strength control, AGP/PCI STRENGTH table
1
4
PCIStrC0
PCI[7:5] strength control, AGP/PCI STRENGTH table
1
3
PCIStrB1
PCI[4:2] strength control, AGP/PCI STRENGTH table
1
2
PCIStrB0
PCI[4:2] strength control, AGP/PCI STRENGTH table
1
PCIStrA1
PCI[1:0] strength control, AGP/PCI STRENGTH table
1
0
PCIStrA0
PCI[1:0] strength control, AGP/PCI STRENGTH table
1
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