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參數(shù)資料
| 型號(hào)： | IDT77301 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| 中文描述： | 128 X 9 OTHER FIFO, 8 ns, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 2/29頁 |
| 文件大?。?/td> | 342K |
| 代理商： | IDT77301 |
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IDT77301
UtopiaFIFO 1 to 4 (128 x 9 x 4) Demultiplexer-FIFO Commercial and Industrial Temperature Ranges
2
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The signaling mode of operation is Utopia Transmt (UtopiaTx). With
UtopiaTx, data transfer is initiated by the device able to receive a cell by
asserting the TxCLAV (cell space available, CLAVR for the input port of
the 77301). The device sending data responds, if a cell is available for
transfer, by asserting the enable, TxENB (
ENR
and
ENS
for the 77301).
During the first byte transfer the TxSOC is asserted to identify the beginning
of the cell transfer. Successive clocks transfer the cell until the last data
transfer. The transfer can only be interrupted by the transmtting agent by
deasserting the TxENB signal. Once reasserted, the process will continue.
Upon completion of the last byte transfer, the condition for additional
transfers is determned by the TxCLAV and TxENB as before. This is
described in greater detail in the Utopia ATM-PHY Level 2 version 1
Document.
additional logic required.) Utopia 1 signalling protocol is supported for
these ports. Data can be read fromeach FIFO output port independently.
Separate input and output port clocks are provided and can be
operated up to 62.5 MHz. This provides the user with 1.125Gbps
composite bandwidth on the input port and 562Mbps bandwidth on each
output port.
Each 77301 has a unique programmable chip identification register.
Multiple UtopiaFIFOs with programmed chip identification can be utilized
to direct a 9, 18, 36 or 64-bit bus to as many as 31 output ports.
The principle application for the 77301 is in ATMnetworking based
systems, but can be used in any cell based data or telecommunications
application requiring the separation of independent data streams froma
single input channel.
77301
100 PIN
TQFP
PN-100
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3240 drw 02
Data b 1
Data b 2
Vcc
Data b 3
Data b 4
Data b 5
Data b 6
Data b 7
GND
Data b 8
SOCSb
CLAVSb
WCLK
DATA 0
b
Vcc
Data c 1
Data c 2
Data c 3
Data c 4
Data c 5
GND
Data c 6
Data c 7
Data c 8
SOCSc
Data c 0
ADR3
ADR4
ADR2
ADR1
ADR0
GND
BSS
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Data 9/P_ID0
GND
Data 10/P_ID1
Data 11/P_CS0
Data 12/P_CS1
Data 13/P_CS2
Vcc
D
a
C
G
S
D
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V
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G
R
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S
M
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B
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c
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-&!
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT77301L12PF | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77301L12PFI | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77305 | UTOPIAFIFO 4 PORT MULTIPLEXER FIFO |
| IDT77911 | Octal Transceivers And Line/MOS Drivers With 3-State Outputs 20-PDIP -40 to 85 |
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| IDT77V011L155DA8 | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| IDT77V106L25TF | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT77V106-L25TFI | 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET TRANSCEIVER, 64 Pin, Plastic, QFP |
| IDT77V252L155PG | 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET SEGMENTATION AND REASSEMBLY CIRCUIT, 208 Pin, Plastic, QFP |
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