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參數(shù)資料
| 型號(hào)： | IDT82P2828BHG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 99/154頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/J1/E1 28+1CH 640-PBGA |
| 標(biāo)準(zhǔn)包裝： | 5 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | E1 |
| 電源電壓： | 3.13 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 640-BGA 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 640-PBGA-EP（31x31） |
| 包裝： | 托盤 |
| 其它名稱： | 82P2828BHG |
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IDT82P2828
28(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Functional Description
49
February 6, 2009
3.5.5.2 Pattern Detection
Data received from the line side or data input from the transmit
system side may be extracted for pattern detection. The direction of data
extraction is determined by the PD_POS bit (b3, PD,...). One of PRBS or
ARB pattern is selected for detection and IB detection is always active.
If data is extracted from the receive path, before pattern detection the
data should be decoded by using AMI or B8ZS (for T1/J1) / HDB3 (for
E1). The decoding rule is selected by the R_CODE bit (b2, RCF1,...).
If data is extracted from the transmit path, before pattern detection
the data should be decoded by using AMI or B8ZS (for T1/J1) / HDB3
(for E1) in Transmit Dual Rail NRZ Format mode and Transmit Dual Rail
RZ Format mode. The decoding rule is selected by the T_CODE bit (b2,
Pseudo Random Bit Sequence (PRBS) /Arbitrary Pattern (ARB)
Detection
The extracted data can be optionally inverted by the PAD_INV bit
(b2, PD,...) before PRBS/ARB detection.
The extracted data is used to compare with the desired pattern. The
desired pattern is re-generated from the extracted data if the desired
pattern is (2^20 - 1) QRSS per O.150-4.5, (2^15 - 1) PRBS per O.152 or
(2^11 - 1) PRBS per O.150; or the desired pattern is programmed in the
ARB[23:0] bits (b7~0, ARBH~ARBM~ARBL,...) if the desired pattern is
ARB. The desired pattern is selected by the PAD_SEL[1:0] bits (b1~0,
PD,...).
In summary, do the followings step by step to detect PRBS/ARB:
Select the detection direction by the PD_POS bit (b3, PD,...);
Set the ARB[23:0] bits (b7~0, ARBH~ARBM~ARBL,...) if the ARB
pattern is desired - this step is omitted if the PRBS pattern is
desired;
Select the desired PRBS/ARB pattern by the PAD_SEL[1:0] bits
(b1~0, PD,...).
The priority of decoding, data inversion, pattern re-generation, bit
programming and pattern comparison is shown in Figure-28.
Figure-28 PRBS / ARB Detection
During comparison, if the extracted data coincides with the re-gener-
ated PRBS pattern or the programmed ARB pattern for more than 64-bit
hopping window, the pattern is synchronized and the PA_S bit (b5,
STAT1,...) will be set.
In synchronization state, if more than 6 PRBS/ARB errors are
detected in a 64-bit hopping window, the pattern is out of synchroniza-
tion and the PA_S bit (b5, STAT1,...) will be cleared.
In synchronization state, each mismatched bit will generate a PRBS/
ARB error. When a PRBS/ARB error is detected during the synchroniza-
tion, the ERR_IS bit (b1, INTS2,...) will be set and an interrupt will be
reported by INT if not masked by the ERR_IM bit (b1, INTM2,...). The
PRBS/ARB error may be counted by an internal Error Counter. Refer to
A transition from ‘0’ to ‘1’ on the PA_S bit (b5, STAT1,...) or any tran-
sition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the PA_S bit (b5, STAT1,...) will
set the PA_IS bit (b5, INTS1,...) to ‘1’, as selected by the PA_IES bit (b5,
INTES,...). When the PA_IS bit (b5, INTS1,...) is ‘1’, an interrupt will be
reported by INT if not masked by the PA_IM bit (b5, INTM1,...).
The PRBS/ARB synchronization status may be indicated by the
RMFn or TMFn pin. Refer to Section 3.5.7 Receive /Transmit Multiplex
from Rx path
or Tx path
Decoding
Data
Inversion
PRBS Re-
Generation
Comparison
ARB[23:0]
Programming
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82P2916 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:16-Channel High-Density T1/E1/J1 Line Interface Unit |
| IDT82P2916BFG | 功能描述:IC LIU T1/E1/J1 16CH SH 484BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| IDT82P2916BFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 16CH SH 484BGA |
| IDT82P5088 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter |
| IDT82P5088BBBLANK | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter |
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