T1 ISDN Mode The T1 ISDN mode corresponds to the use of 23 time slots to " />
參數(shù)資料
型號(hào): IDT82V2616BBG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 16/99頁(yè)
文件大?。?/td> 0K
描述: IC INVERSE MUX 16CH ATM 272-PBGA
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: 無(wú)線
接口: Utopia
電源電壓: 2.97 V ~ 3.63 V
封裝/外殼: 260-BGA
供應(yīng)商設(shè)備封裝: 260-PBGA(19x19)
包裝: 托盤
安裝類型: 表面貼裝
其它名稱: 82V2616BBG
INTERFACE
23
December 4, 2006
IDT82V2616
Inverse Multiplexing for ATM
T1 ISDN Mode
The T1 ISDN mode corresponds to the use of 23 time slots to
transmit data, that is, T1 data is not transmitted during the framing bit
and time slot 24. Therefore, only 23 time slots are considered useful and
are mapped while time slot 24 and the framing bit are meaningless and
are not mapped.
T1 Normal Mode
In this mode, data is not transmitted during the framing bit. The other
24 time slots are useful.
3.2.1.3 Mode5~Mode6
In these modes, the transmit/receive data rate is T1 channelized, and
the line interface timing clock is 1.544 MHz (T1 clock). The ISDN mode
and normal mode are defined in T1 ISDN Mode and T1 Normal Mode on
3.2.1.4 Mode7~Mode10
In these modes, only TSCCK and RSCCK are used to input the
8.192 MHz clock in Tx and Rx directions respectively, and TSCFS and
RSCFS are used as common frame pulse in Tx and Rx directions
respectively. All the TSCK[i], TSF[i], RSCK[i] and RSF[i] pins are not
used and should be connected to ground. The unused RSD pins should
also be connected to ground.
The data pins used for multiplexing are shown in the table below:
Multi-rate
Multi-rate is used for multiplexing four E1 streams into one high-
speed stream. Figure-7 shows four 2.048 MHz E1 streams multiplexed
into a single 8.192 MHz stream through one data pin. The multiplexing
uses the round-robin technology. The system provides 8.192 MHz
common clock and 8 kHz common frame pulse.
For T1 channel, before multiplexing, a mapping from each T1 frame
to E1 frame is first done. Then the mapped 4 E1 channels are multi-
plexed into one 8.192 MHz stream as shown in Figure-7.
Figure-7 Multiplexing Four 2 MHz Streams into One 8
MHz Stream
T1 Multi-Rate Mode
Since there are two T1 to E1 mapping methods that can be used as
described in G.802 Mapping and Spaced Mapping on page 21, two new
modes can be derived when multiplexing is further used. Again, T1
ISDN data mode and T1 normal mode can be applied, thus we have 4
more modes: mode7~mode10.
3.2.1.5 Mode11
In this mode, the transmit and receive data are viewed as a contin-
uous 2.048 Mb/s serial stream. There is no concept of time slot in an
unchannelized link. Each eight bits are grouped into an octet. TSF or
TSCFS signal determine whether the data stream is in byte alignment or
not. The first bit received/transmitted is the most significant bit of an
octet while the last bit is the least significant bit. The 2.048 MHz data
stream clock is provided by the system.
In this mode, the clock for Tx and Rx can be either common clock or
independent clock. If common clock is used, TSCCK and RSCCK are
used as Tx clock and Rx clock respectively. If independent clock is used,
the clock for the i-th link comes from TSCK[i] and RSCK[i] in Tx and Rx
directions respectively.
In Common Clock Mode, the TSCFS signal is used for byte align-
ment pulse for the transmitted bit stream while in Independent Clock
Mode, the TSF[i] signal is used for byte alignment pulse for the i-th
transmit link.
The frequency for TSF[i] (or TSCSF) is the result of TSCK[i] (or
TSCCK) divided by 256 and the pulse width of this signal is one cycle of
TSCK[i] or TSCCK signal.
3.2.1.6 Mode12~Mode13
These two modes are E1 non-multi-rate combined with different
signalling modes. The non-multi-rate is the channelized generic E1 inter-
face, i.e., a 2.048 MHz channel is divided into 32 sub-channels (also
called time slots), and these sub-channels are used to exchange data.
Table-3 Pins Used in Multi-Rate Multiplex Mode
Tx Pin Name
Rx Pin Name
Multiplexed Channel
TSD[1]
RSD[1]
channel 1~channel 4
TSD[2]
RSD[2]
channel 5~channel 8
TSD[3]
RSD[3]
channel 9~channel 12
TSD[4]
RSD[4]
channel 13~channel 16
0
1
2
3
4
5
6
7
8
9
10
11
Byte0
Byte1
Byte2
Byte0
Byte1
Byte2
Byte0
Byte1
Byte2
Byte0
Byte1
Byte2
1st 2 Mbps stream
2nd 2 Mbps stream
3rd 2 Mbps stream
4th 2 Mbps stream
8 Mbps stream
相關(guān)PDF資料
PDF描述
IDT88K8483BRI IC SPI-4 EXCHANGE 3PORT 672-BGA
IDT88P8341BHI IC SPI3-SPI4 EXCHANGE 820-PBGA
IDT88P8342BHI IC SPI3-SPI4 EXCHANGE 820-PBGA
IDT88P8344BHI IC SPI3-SPI4 EXCHANGE 820-PBGA
IDT89H24NT24G2ZBHLG IC PCI SW 24LANE 24PORT 324BGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT82V3001A 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL WITH SINGLE REFERENCE INPUT
IDT82V3001A_08 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL WITH SINGLE REFERENCE INPUT
IDT82V3001APV 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL WITH SINGLE REFERENCE INPUT
IDT82V3001APVG 功能描述:IC PLL WAN W/SGL REF INP 56SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/頻率發(fā)生器,多路復(fù)用器 PLL:是 主要目的:存儲(chǔ)器,RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6
IDT82V3001APVG8 功能描述:IC PLL WAN W/SGL REF INP 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT